Resistive Memory Buffer for Drift Stabilization

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Resistance drift phenomena in phase-change memory cells can lead to data read errors due to changes in resistance over time, affecting the reliability of data storage and retrieval in non-volatile memory devices.

Innovation Solution

A memory device with a memory cell array and a buffer system that secures a stabilization time for resistive memory cells, allowing sufficient time for resistance drift to occur, and a control circuit that compares data from the buffer and memory cell array to determine the correct storage location for program data, ensuring reliable data input and output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the memory device is miniaturized to reduce size, then the device dimensions are improved, but data reliability deteriorates due to resistance drift phenomenon

Engineering Contradiction:
Improvememory device sizeVSAvoiddata reliability
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

A buffer is introduced as an intermediary component between the memory cell array and the external interface. The buffer temporarily stores data and provides a stabilization time period during which resistance drift can occur, allowing the system to read corrected data after the drift has settled, thus maintaining data reliability in miniaturized devices

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a buffer is added to secure stabilization time for resistance drift, then data reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedata reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The buffer functionality is merged with the existing memory structure, utilizing the same memory cell array to serve both as permanent storage and as a temporary buffer. This integration approach provides the necessary stabilization time without adding completely separate buffer components, thereby reducing the increase in device complexity

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If the stabilization time is extended to allow resistance drift completion, then measurement precision is improved, but processing speed deteriorates

Engineering Contradiction:
Improvedata accuracyVSAvoiddata processing speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The system uses periodic read operations where data is initially written, then read again after the stabilization time period has elapsed. This periodic approach allows resistance drift to complete during the interval while maintaining high overall processing speed by quickly performing the actual data transfer operations

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution ensures reliable data storage and retrieval by minimizing the impact of resistance drift, allowing for high-speed data processing and reducing the size of the memory device while maintaining data integrity.

Implementation Method 1

a first resistive memory cell and a second resistive memory cell which each include a resistive change material and store different data according to a value of their resistance

Methodology Applied
Scientific EffectResistive switching: Electrical Resistance

Data Source

PatentUS10074426B2Memory device having resistance change material and operating method for the memory device
Publication Date: 2018.09.11 SAMSUNG ELECTRONICS CO LTD
  • US10074426B2 patent drawing
  • US10074426B2 patent drawing
  • US10074426B2 patent drawing

AI summary

A memory device having a resistance change material and an operating method of the memory device are provided. A memory device includes a memory cell array including first and second resistive memory cells, which store different data according to the change of their resistance; a buffer including first and second storage regions corresponding to the first and second resistive memory cells, respectively; and a control circuit receiving program data to be programmed to the memory cell array, comparing first data stored in the first storage region and second data stored in the first resistive memory cell, and as a result of the comparison determining one of the first and second storage regions as a storage region to which to write the program data.