Resistive Memory Reference Calibration Circuit
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Solution Overview
Problem
Resistive memory devices face reliability issues due to variations in processes, voltage, and temperature affecting the reference resistance, leading to errors in read operations.
Innovation Solution
A resistive memory device with a calibration resistor circuit that includes a calibration resistor, sense amplifiers, and switches to compare reference currents with read currents during both read and calibrate operations, ensuring accurate resistance matching through controlled paths for calibration currents and reference currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a reference resistor is used to determine the resistance of the variable resistance element, then the read operation can be performed, but the reference resistance changes due to process variation, voltage, and temperature, degrading reliability
Solution Approach 1:
The patent applies preliminary action by performing calibration before the actual read operation. A calibration resistor circuit is used to determine the actual resistance value of the reference resistor under current process, voltage, and temperature conditions. This preliminary calibration action allows the system to compensate for resistance changes and maintain accurate read operations throughout the memory device's operational life.
2Device complexity
If the reference resistor path is simplified, then the device complexity is reduced, but the ability to compensate for resistance variations is limited
Solution Approach 1:
The patent applies segmentation by dividing the calibration function into separate components: a calibration resistor circuit, a sense amplifier, and a controller. The calibration resistor circuit includes multiple resistors (reference resistor, calibration resistor, and additional resistors) that can be selectively connected through switches. This segmented architecture allows the system to perform calibration without permanently increasing device complexity, as the additional components can be disabled during normal read operations.
3Measurement precision
If calibration operations are performed frequently, then reference resistance accuracy is maintained, but the time required for read operations increases
Solution Approach 1:
The patent applies preliminary action by performing calibration before the read operation sequence. The controller first executes the calibration operation to determine the actual resistance value of the reference resistor, stores this calibrated value, and then proceeds with the read operation. This timing strategy ensures that the reference resistor is calibrated under current conditions without interfering with the actual data read process, thereby maintaining both accuracy and operational efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the accuracy of read operations by stabilizing reference resistances, reducing errors caused by variations, and improving the reliability of data retrieval in resistive memory devices.
Implementation Method 1
Resistive memory devices are capable of storing data in a memory cell including a variable resistance element. To detect data stored in the memory cell of a resistive memory device, for example, a read current or read voltage may be provided to the memory cell, and a corresponding read voltage or read current changed by the variable resistance element of the memory cell may be detected.
Data Source
AI summary
A resistive memory device configured to calibrate a reference resistor includes a calibration resistor circuit including a calibration resistor, a first reference resistor, a first sense amplifier configured to compare input currents, a first switch set including a plurality of switches, and a controller configured to control the first switch set to allow the first sense amplifier to compare a first reference current passing through the first reference resistor with a first read current passing through a first memory cell during a read operation and compare the first reference current with a first calibration current passing through the calibration resistor during a calibrate operation. A path of the first reference current during the read operation is different from a path of the first reference current during the calibrate operation.