Resistive Memory Current Limiting for Failure Recovery
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Solution Overview
Problem
Resistive change memory elements can break during programming, leading to a fixed low-resistive state and operation failures, which conventional redundant bit replacement methods cannot alleviate when the number of failure bits exceeds a certain threshold, and there is no known method to transition a failure bit to a high-resistive state.
Innovation Solution
An integrated circuit design that includes a driver to limit current flowing in resistive change memory elements using multiple current limit values, allowing transition from a low-resistive to a high-resistive state, and a resetting method that uses different limit current values to prevent short-circuit failure states and enable reliable operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If current limiting method is used during programming, then resistance value control and prevention of excessive current are improved, but memory elements may still break and become failure bits
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the current limit value based on the programming state. During initial programming, a first current limit value is applied to prevent excessive current. When transitioning from low-resistive to high-resistive state, a second current limit value (higher than the first) is applied to enable successful transition without causing damage. This dynamic parameter adjustment resolves the contradiction between preventing current-induced damage and achieving reliable programming.
2Reliability
If redundant bit replacement method is used to relieve failure bits, then circuit operation is maintained for small numbers of failures, but circuit relief becomes impossible when failure bits exceed a certain threshold
Solution Approach 1:
The patent converts the harmful effect of failure bits (fixed low-resistive state) into a beneficial outcome by applying a higher current limit value during reset operation. This enables failure bits to transition from low-resistive to high-resistive state, effectively reversing the damage. The harmful fixed state is transformed into a functional high-resistive state, allowing the memory element to be reused and eliminating the need for redundant bit replacement when failure count exceeds the threshold.
3Ease of operation
If high current is applied to transition memory element to high-resistive state, then programming transition is achieved, but memory element may break due to excessive current
Solution Approach 1:
The patent resolves this contradiction by changing the current limit parameter based on the programming phase. During the transition from low-resistive to high-resistive state, a second current limit value (higher than the first) is applied to enable successful transition. This higher current allows the memory element to overcome the low-resistive state and transition to high-resistive state without causing damage, as the current is still controlled within safe limits. This dynamic parameter adjustment enables both ease of operation and reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents memory elements from becoming short-circuit failure states, allowing for reliable operation and enabling the transition of erroneously set memory elements back to a high-resistive state, thereby improving circuit reliability and preventing the accumulation of defects.
Implementation Method 1
a resistive change layer provided between the first electrode and the second electrode, in each of which a resistive state between the first electrode and the second electrode can be programmed from one of a first resistive state and second resistive state, which has a larger resistance value than the first resistive state, to the other
Data Source
AI summary
An integrated circuit according to an embodiment includes: a plurality of first wiring lines; a plurality of second wiring lines intersecting with the plurality of first wiring lines; a plurality of resistive change memory elements provided in cross regions of the plurality of first and second wiring lines, each of which includes a first electrode connected to a corresponding first wiring line, a second electrode connected to a corresponding second wiring line, and a resistive change layer provided between the first and second electrodes, and in each of which a resistive state between the first electrode and the second electrode can be programmed from one of a first resistive state and a second resistive state, which has a larger resistance value than the first resistive state, to the other; and a driver driving the plurality of first and second wiring lines.