Resistive Memory Write Driver Dynamic Current Control
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Solution Overview
Problem
Current nonvolatile memory devices using resistance materials face challenges in achieving improved program speed and reduced power consumption, particularly in effectively programming and verifying resistive memory cells across multiple states.
Innovation Solution
The method involves selecting first and second write drivers based on predetermined currents to perform program operations on resistive memory cells, verifying their success, and reprogramming failed cells using a second program loop with overlapping drivers, along with a write & verify driver configuration that includes multiple write drivers, sense amplifiers, and a register to manage failed bit information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple write drivers are used to program resistive memory cells in parallel, then program speed is improved, but power consumption increases due to excessive current usage
Solution Approach 1:
The system dynamically adjusts the number of active write drivers based on the maximum operation current. The controller monitors current usage and activates or deactivates write drivers dynamically to match the available current budget, enabling the system to operate at optimal performance levels without exceeding power constraints
Solution Approach 2:
The system changes the operational parameters by adjusting the number of active write drivers according to current conditions. When maximum current is available, more drivers are activated for faster programming; when current is limited, fewer drivers are used to maintain acceptable programming speed while reducing power consumption
2Reliability
If all write drivers operate continuously to ensure complete programming, then reliability is improved, but power consumption increases
Solution Approach 1:
The system implements a feedback mechanism where sense amplifiers verify the programming status of memory cells after each programming attempt. The controller receives feedback about which cells have been successfully programmed and which have failed, then selectively re-applies programming only to the failed cells in subsequent operation loops, avoiding redundant programming of already successful cells
Solution Approach 2:
Instead of continuously operating all write drivers, the system applies partial action by selectively re-programming only the subset of cells that failed the verification test. This reduces unnecessary current consumption while maintaining reliability by ensuring all cells eventually achieve correct programming state
3Productivity
If the number of write drivers is increased to handle more memory cells, then program speed is improved, but device complexity increases
Solution Approach 1:
The system uses dynamic configuration where the number of active write drivers is adjusted based on operational requirements and current availability. The controller can activate or deactivate write drivers dynamically, allowing the same hardware infrastructure to adapt to different programming scenarios without requiring a fixed complex configuration for all cases
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances program speed and reduces power consumption by efficiently identifying and reprogramming failed memory cells, ensuring accurate data storage across multiple states while optimizing the number of write drivers and current usage.
Implementation Method 1
nonvolatile memories using resistance materials store data using a state change of a phase-change material, such as chalcogenide alloy
Implementation Method 2
The phase-change material has low resistance in the crystalline state and has high resistance in the amorphous state
Data Source
AI summary
A method is provided for driving a nonvolatile memory device. The method includes selecting first write drivers based on a predetermined current, performing a first program operation on resistive memory cells corresponding to the first write drivers, verifying whether the resistive memory cells have passed or failed in the first program operation and sorting information regarding failed bit memory cells that failed in the first program operation, selecting second write drivers based on the sorted failed bit memory cell information, and performing a second program operation on resistive memory cells corresponding to the second write drivers.