Resistive Memory Flip-Flop Circuit Standby Power Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flip-flop circuits in digital electronic systems face high power consumption due to leakage current when in standby mode, necessitating low leakage transistors or non-volatile alternatives to retain logic data without power.
Innovation Solution
A memory storage circuit comprising a volatile memory portion for storing complementary logic data as electrical potentials and a non-volatile memory portion using resistive memory elements to store data in different resistance states, with a control portion managing the storage and retrieval of data through transistors and resistive memory elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a general flip-flop circuit is used, then logic data can be retained, but leakage current causes excess power consumption in standby state
Solution Approach 1:
The flip-flop circuit is segmented into two distinct portions: a volatile memory portion for active data storage and a non-volatile memory portion for standby data retention. This segmentation allows each portion to be optimized for its specific function, with the non-volatile portion eliminating leakage current issues during standby while the volatile portion maintains fast access during active operation.
Solution Approach 2:
The circuit dynamically switches between using the volatile memory portion during active operation and the non-volatile memory portion during standby state. Control signals enable or disable connections between these portions based on the operational state, allowing the system to adapt its data retention mechanism to minimize power consumption while maintaining reliability.
2Use of energy by moving object
If low leakage transistors are used to reduce power consumption, then standby power is reduced, but device complexity increases
Solution Approach 1:
The invention merges volatile and non-volatile memory technologies into a single integrated circuit structure. By combining these two memory types within the same flip-flop architecture, the system achieves low power consumption during standby without requiring separate circuits or complex control mechanisms, thus avoiding increased device complexity.
3Reliability
If non-volatile flip-flop circuit is used, then data can be retained without power supply, but manufacturing precision requirements increase
Solution Approach 1:
The circuit is divided into separate volatile and non-volatile memory portions, each fabricated using optimized processes for their specific requirements. This segmentation allows the non-volatile portion to be manufactured with precise parameters for data retention, while the volatile portion uses standard processes, thereby managing overall manufacturing precision requirements without excessive complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces power consumption by allowing data retention without power supply, maintaining low resistance states for stored data and switching to high resistance states as needed, ensuring efficient data storage and retrieval while minimizing standby power usage.
Implementation Method 1
The non-volatile memory portion includes a first resistive memory element and a second resistive memory element to store the pair of complementary logic data as respective different resistance states
Data Source
AI summary
A memory storage circuit includes a volatile memory portion, a control portion, and a non-volatile memory portion. The volatile memory portion includes a first node and a second node to store a pair of complementary logic data. The control portion includes a first transistor and a second transistor. Gate electrodes of the first and second transistors are coupled to receive a store signal, and first electrodes of the first and second transistors are coupled to receive a control signal. The non-volatile memory portion includes a first resistive memory element and a second resistive memory element to store the pair of complementary logic data. The first resistive memory element is coupled between a second electrode of the first transistor and the first node, and the second resistive memory element is coupled between a second electrode of the second transistor and the second node.