Resistive Memory Gate Voltage Generator Merging
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Solution Overview
Problem
Resistive memory devices face challenges in reducing power consumption while maintaining high read and write speeds, durability, and low power consumption, which are essential for efficient data storage.
Innovation Solution
The proposed resistive memory device incorporates a bitline, source line, memory cell, first and second transistors, a gate voltage generator with a variable resistor, and a write driver that generates distinct gate voltages based on the resistance of the variable resistor, optimizing power usage by employing a gate voltage generator with an operational amplifier or charge pump to reduce the area occupied and power consumption during write operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a conventional gate voltage generator is used, then the memory device can perform write operations, but the area occupied and power consumption increase
Solution Approach 1:
The patent combines the gate voltage generator functionality into a shared structure where a single generator produces gate voltages for multiple transistors (first and second transistors) through a multiplexer. This merging approach reduces the total area and power consumption compared to having separate gate voltage generators for each transistor, directly addressing the contradiction between functionality and resource usage.
Solution Approach 2:
The gate voltage generator is designed as a universal component that can generate gate voltages for different transistors based on control signals. The multiplexer enables this universal functionality by routing the generated gate voltages to different destinations (first or second transistor) depending on the write operation requirements, thereby reducing overall device complexity while maintaining full write operation capability.
2Ease of operation
If separate gate voltage generators are used for each transistor, then each transistor can be controlled independently, but the area and power consumption increase
Solution Approach 1:
The patent merges multiple gate voltage generation functions into a single gate voltage generator that serves both the first and second transistors. The multiplexer enables independent control of each transistor by selectively routing the generated gate voltages to the appropriate transistor based on control signals, thus maintaining ease of operation while reducing the area occupied.
Solution Approach 2:
The multiplexer acts as an intermediary component between the single gate voltage generator and the multiple transistors. It receives control signals and routes the generated gate voltages to the appropriate transistor, enabling independent control functionality without requiring separate gate voltage generators for each transistor, thereby resolving the area versus control independence contradiction.
Data Source
AI summary
A resistive memory device is provided. The resistive memory device includes a bitline, a source line, a memory cell electrically connected to the bitline and the source line by a first switch, a first transistor electrically connected to the bitline, a second transistor electrically connected to the source line, a gate voltage generator configured to generate a first gate voltage that is provided to a gate electrode of the first transistor, and configured to generate a second gate voltage that is provided to a gate electrode of the second transistor and a second switch that provides the first and second gate voltages to the gate electrodes of the first and second transistors.