Resistive Memory Programming via Sequential Post Pulses

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Resistive memory devices face performance degradation due to resistance drift over time, which slows down programming speed and requires refresh operations, affecting their efficiency and reliability.

Innovation Solution

A programming method for resistive memory devices that involves applying a program pulse followed by a series of post pulses with sequentially increasing voltage levels after a relaxation time, accelerating resistance drift and reducing programming duration without exceeding a voltage limit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a program pulse is applied to a resistive memory cell, then the resistance state is changed, but resistance drift occurs over time which degrades performance

Engineering Contradiction:
Improveperformance stabilityVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies post pulses after the main program pulse to preemptively accelerate and complete the resistance drift process. By performing this preliminary action immediately after programming, the resistance stabilizes faster, reducing the time loss while maintaining performance stability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses a sequence of periodic post pulses with increasing voltage levels applied at specific time intervals after the main program pulse. This periodic action structure accelerates the resistance drift process in controlled stages, resolving the contradiction between speed and stability.

Inventive Principle:
Principle #19Periodic action

2Productivity

If the resistance drift is accelerated using post pulses, then the programming speed is improved, but the voltage levels must be controlled to not exceed limits

Engineering Contradiction:
Improveprogramming speedVSAvoidvoltage control complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the voltage application process into segments: a main program pulse followed by multiple post pulses with progressively increasing voltage levels. Each post pulse is applied after a relaxation time, breaking down the complex voltage control into manageable stages that accelerate drift without exceeding voltage limits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent systematically changes voltage parameters by applying post pulses with sequentially increasing voltage levels (Vpp1 < Vpp2 < Vpp3). This parameter progression accelerates resistance drift while maintaining control within safe voltage boundaries, improving programming speed without excessive complexity.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances programming speed and performance by accelerating resistance drift, thereby reducing the time required for programming and allowing for earlier read operations, thus improving the overall efficiency and reliability of resistive memory devices.

Implementation Method 1

Materials used in resistive memory devices have a resistance that is variable depending on magnitude and/or direction of applied voltage and/or current

Methodology Applied
Scientific EffectVariable resistance: Electrical Resistance

Implementation Method 2

the resistance of the material can be maintained (that is, non-volatility) even though the applied voltage and/or current is removed

Methodology Applied
Scientific EffectNon-volatility:

Implementation Method 3

the resistance of the programmed resistive memory cell may be drifted or shifted over time

Methodology Applied
Scientific EffectResistance drift:

Data Source

PatentUS10867672B2Resistive memory device and programming method of the same
Publication Date: 2020.12.15 SAMSUNG ELECTRONICS CO LTD
  • US10867672B2 patent drawing
  • US10867672B2 patent drawing
  • US10867672B2 patent drawing

AI summary

In some example embodiments, a program pulse is applied to a resistive memory cell and a plurality of post pulses are applied to the resistive memory cell at a time point after a relaxation time from a time point when application of the program pulse is finished, the plurality of post pulses having voltage levels that increase sequentially. Programming speed and/or performance of the resistive memory device may be enhanced by accelerating resistance drift of the resistive memory cell using the plurality of post pulses having the voltage levels that increase sequentially.