Resistive Memory Read Method Using Bit Line Stop Feedback

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Solution Overview

Problem

Resistive memory devices face challenges in stable data reading due to repetitive turn-on and turn-off of memory cells during read operations, leading to read disturbance and data instability.

Innovation Solution

A method for operating electronic devices with memory cells involves precharging and floating word lines, driving bit lines to apply read voltage, and stopping the bit line driving when the memory cell is turned on to prevent repetitive switching and maintain data stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If bit line driving is continued to apply read voltage to memory cell, then data reading is achieved, but memory cell undergoes repetitive turn-on and turn-off causing read disturbance and data instability

Engineering Contradiction:
Improvedata reading accuracyVSAvoiddata stability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The word line is precharged to a predetermined voltage level before the read operation begins. This preliminary action ensures that when the bit line is driven and the memory cell turns on, the word line is already in the correct state to immediately conduct current, enabling fast and stable data reading without requiring continuous bit line driving that would cause read disturbance

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The read operation monitors the state of the memory cell during the read process. When the memory cell turns on (indicating data retrieval), the system detects this state change and stops further bit line driving. This feedback mechanism prevents over-driving the bit line and avoids repetitive switching that would cause read disturbance and data instability

Inventive Principle:
Principle #23Feedback

2Reliability

If bit line driving is stopped when memory cell is turned on, then read disturbance is prevented, but read operation must be precisely controlled

Engineering Contradiction:
Improvedata stabilityVSAvoidcontrol complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The control logic monitors the voltage level or current state of the memory cell during the read operation and automatically stops bit line driving when the memory cell turns on. This feedback-based control simplifies the overall system by using the memory cell's own state change as the stop signal, rather than requiring external timing control

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The memory cell itself provides the control signal for stopping the bit line driving by turning on and changing its resistance state. This self-service mechanism eliminates the need for complex external control circuits to track timing and stop the operation at the precise moment, reducing control complexity while maintaining data stability

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach stabilizes data reading by preventing read disturbance and ensuring accurate data retrieval from resistive memory devices by stopping the bit line driving once the memory cell is turned on, thus reducing errors and maintaining data integrity.

Implementation Method 1

a resistive memory device using a variable resistance material capable of switching between at least two different resistance states due to a drastic change in resistance caused by a bias being applied to the variable resistance material

Methodology Applied
Scientific EffectVariable resistance: Electrical Resistance

Data Source

PatentUS10978147B2Reading method of resistive memory device
Publication Date: 2021.04.13 SK HYNIX INC
  • US10978147B2 patent drawing
  • US10978147B2 patent drawing
  • US10978147B2 patent drawing

AI summary

An electronic device includes a semiconductor memory. The semiconductor memory includes a bit line, a word line crossing the bit line, and a memory cell coupled to and disposed between the bit line and the word line. In a read operation, when the word line, which is in a precharged state, is floated, the bit line is driven to increase a voltage level of the bit line, and stopped when the memory cell is turned on.