Resistive Memory Devices With Recessed Gates And Protrusions
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Solution Overview
Problem
Resistive memory devices face challenges in achieving improved electric characteristics due to the polarity-dependent resistance of variable resistance layers, which affects data storage and retrieval efficiency.
Innovation Solution
The design involves vertically stacked and horizontally recessed gates with a variable resistance layer forming protrusions towards the recessed gates, creating a vertical current path and allowing for bipolar switching operations by altering the electric field direction, while also optimizing the structure of the gate insulating layer and channel thicknesses to enhance electric characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a variable resistance layer is applied with voltage to change resistance depending on polarity, then data storage capability is achieved, but electric characteristics and switching efficiency are limited
Solution Approach 1:
The patent introduces a protrusion structure that extends from the variable resistance layer toward the gate in the horizontal direction, adding a spatial dimension to the resistance change mechanism. This protrusion structure enables more effective electric field modulation and improves switching efficiency while maintaining data storage capability.
Solution Approach 2:
The patent utilizes the polarity-dependent resistance parameter of the variable resistance layer to achieve data storage. By changing the resistance state based on voltage polarity, the device achieves reliable data storage while the protrusion structure enhances the switching efficiency through improved electric field distribution.
2Productivity
If gates are vertically stacked to increase storage density, then device capacity is improved, but current consumption increases
Solution Approach 1:
The patent applies local quality by creating a protrusion structure at specific locations where the variable resistance layer extends toward the gate. This localized structural modification improves electric field concentration and switching efficiency in critical regions, enabling lower current consumption while maintaining high storage density achieved through vertical gate stacking.
3Reliability
If the variable resistance layer forms protrusions toward recessed gates, then electric characteristics are improved, but manufacturing complexity increases
Solution Approach 1:
The patent segments the variable resistance layer into a vertical layer portion and a protrusion portion that extends horizontally toward the gate. This segmentation allows independent optimization of each portion's function while simplifying the manufacturing process through sequential formation steps, reducing overall structural complexity despite improved electric characteristics.
4Productivity
If the channel is formed to extend vertically and horizontally along recessed gates, then current path efficiency is improved, but fabrication difficulty increases
Solution Approach 1:
The patent forms the channel to extend in both vertical and horizontal directions, creating a three-dimensional current path that follows the recessed gate structure. This multi-dimensional channel configuration improves current path efficiency by providing optimized conduction paths, while the fabrication is managed through sequential processing steps that reduce overall difficulty.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the electric characteristics of resistive memory devices, enabling efficient data storage and retrieval with reduced current consumption and improved reliability, while allowing for scalable device design.
Implementation Method 1
When a variable resistance layer is applied with a voltage, resistance of the variable resistance layer may be significantly changed depending on the polarity of the applied voltage. This effect may be utilized to store data in a memory device.
Data Source
AI summary
Resistive memory devices are provided having a gate stack including insulating layers and gates stacked on a substrate in a vertical direction, a channel penetrating the gate stack in the vertical direction to be electrically connected to the substrate, a gate insulating layer provided between the channel and the gates, and a variable resistance layer disposed along an extending direction of the channel. The gate stack may include an alcove formed by recessing the gate in a horizontal direction. The variable resistance layer may extend toward the alcove in the horizontal direction and be overlapped with at least one of the gates in the horizontal direction. Related methods are also provided.