Resistive Memory Refresh via Recovery Pulse and Data Re-write
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Solution Overview
Problem
Resistive memory devices face data integrity issues due to the drift phenomenon, which causes resistance values to change over time, necessitating effective refresh operations to maintain stored data.
Innovation Solution
A method involving a first refresh operation with sequential application of a recovery pulse to resistive memory cells, followed by a second refresh operation that re-writes data in each cell, utilizing a resistive memory element and a selection element like an Ovonic Threshold Switch (OTS), with specific voltage levels and operational cycles to stabilize data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional refresh operation is performed on resistive memory cells, then data integrity is maintained, but power consumption increases and operation time is extended
Solution Approach 1:
The refresh operation is segmented into two distinct types: a first refresh operation that applies a recovery pulse to restore resistance values, and a second refresh operation that performs read-verify-write to correct drift errors. This segmentation allows the system to use the low-power first refresh operation for routine maintenance and only invoke the higher-power second refresh operation when actually needed, thereby reducing overall power consumption while maintaining data integrity.
Solution Approach 2:
The patent changes the operational parameters of the refresh operation by applying a recovery pulse with a specific voltage level (higher than the read voltage but lower than the write voltage) to restore resistance values without fully rewriting data. This parameter optimization allows effective refresh with reduced power consumption compared to conventional full read-verify-write operations.
2Reliability
If a conventional refresh operation is performed on resistive memory cells, then data integrity is maintained, but operation time is extended
Solution Approach 1:
The refresh operation is segmented into two distinct types: a first refresh operation that applies a recovery pulse to restore resistance values, and a second refresh operation that performs read-verify-write to correct drift errors. This segmentation allows the system to use the fast first refresh operation for routine maintenance and only invoke the slower second refresh operation when actually needed, thereby reducing overall operation time while maintaining data integrity.
Solution Approach 2:
The patent implements periodic first refresh operations at predetermined intervals to restore resistance values before significant drift occurs. This periodic maintenance approach prevents the accumulation of drift errors, reducing the need for time-consuming second refresh operations and overall extending the time between comprehensive refresh cycles.
3Stability of the object's composition
If resistance values are restored by applying voltage to memory cells, then data stability is improved, but performance degradation occurs due to excessive current
Solution Approach 1:
The patent optimizes the voltage level of the recovery pulse to be higher than the read voltage (which would turn on the memory cells) but lower than the write voltage (which would change the resistance values). This precise parameter control allows the recovery pulse to restore drift-induced resistance changes and stabilize data without applying excessive current that would cause performance degradation or unintended data changes.
Solution Approach 2:
The patent replaces the conventional mechanical approach of applying high current to restore resistance values with a more refined electrical approach using a recovery pulse of specifically controlled voltage level. This substitution allows effective restoration of resistance values while avoiding the harmful effects of excessive current, thereby maintaining device performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively stabilizes data in resistive memory devices by combining a low-current recovery pulse operation with data re-write operations, enhancing data integrity and reducing power consumption while preventing performance degradation.
Implementation Method 1
a resistive memory element M and a selection element S... a recovery pulse of a voltage level higher than a read voltage level but lower than a write voltage level is applied to both ends of the selected memory cell
Implementation Method 2
the selection device may be an Ovonic Threshold Switch (OTS)
Data Source
AI summary
A method for operating a memory device comprising a plurality of memory cells, the method may include: performing a first refresh operation comprising sequentially applying a recovery pulse to each of the plurality of memory cells and repeating the sequential application of the recovery pulse to each of the plurality of memory cells for a predetermined number of times; and performing a second refresh operation comprising sequentially re-writing data of each of the plurality of memory cells once after the first refresh operation is performed for the predetermined number of times.