Resistive Memory Read Margin via Stepped Post-Write Pulse
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Resistive memory devices experience reduced read margins and increased read errors due to degradation in resistance characteristics over time, leading to a narrowing of the read window between low-resistance and high-resistance states, which affects the accuracy and reliability of data storage.
Innovation Solution
A method of operating resistive memory devices involves applying a post-write pulse with stepped voltage levels or multiple pulses to increase the resistance of memory cells, thereby extending the read margin and reducing read errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory cells are programmed to store data based on resistance state changes, then data storage capability is achieved, but read margin deteriorates over time due to resistance characteristic degradation
Solution Approach 1:
The patent applies preliminary action by performing a post-write pulse operation immediately after the initial write pulse to reshape the resistance distribution before read operations. This preliminary reshaping prevents the natural degradation that would otherwise occur during normal operation, proactively maintaining the read margin before it deteriorates.
Solution Approach 2:
The patent changes the resistance parameter distribution by applying a post-write pulse that specifically increases the resistance of cells already in the high-resistance state. This parameter change creates a more favorable resistance distribution with better separation between logic 0 and logic 1 states, thereby improving the read margin without requiring changes to the physical memory structure.
2Measurement precision
If a simple write pulse is applied to program memory cells, then write operation speed is maintained, but read accuracy deteriorates due to insufficient resistance separation
Solution Approach 1:
The patent merges the write operation with an additional post-write pulse operation to achieve both write functionality and read margin improvement. By combining these operations in sequence and controlling them through integrated circuitry, the system achieves enhanced read accuracy without requiring completely separate and complex write and read preparation mechanisms.
Solution Approach 2:
The post-write pulse operation serves dual purposes: it maintains the written data state while simultaneously improving the resistance distribution for future reads. This self-service approach allows the write operation to automatically prepare the memory cells for accurate reading without requiring additional dedicated read-preparation circuitry or operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The application of post-write pulses effectively increases the read margin between resistance states, enhancing the accuracy and reliability of data storage by maintaining a wider read window and reducing errors in resistive memory devices.
Implementation Method 1
applying a post-write pulse to the memory cells to increase a resistance of the memory cells that are in the target resistance state
Data Source
AI summary
A method of operating a resistive memory device to increase a read margin includes applying a write pulse to a memory cell such that the memory cell is programmed to a target resistance state, and applying a post-write pulse to the memory cell to increase a resistance of the memory cell that is in the target resistance state, the post-write pulse being applied as a single pulse having at least n stepped voltage levels, n being an integer equal to or more than 2, and an n-th stepped voltage level of the post-write pulse is set to be lower than a minimum threshold voltage level of the target resistance state that is changed by an (n−1)-th stepped voltage level of the post-write pulse.