Resistive Memory Programming for Thermal Stress Retention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current non-volatile resistive memories, such as RRAM, face challenges in retaining programmed information during assembly processes due to thermal stress, as the low resistance state is thermally unstable and information retention time decreases significantly at high temperatures, making pre-programming before assembly unreliable.
Innovation Solution
A method to differentiate and maintain the original resistive state of memory cells after assembly, allowing for identification of pre-programmed cells and altering them to a second or third resistive state as needed, using specific voltage applications that do not alter the cells in the original state, thereby ensuring data retention and efficient reading with low power dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If non-volatile resistive memory cells are pre-programmed before assembly, then programming time after assembly is reduced and data can be loaded before mounting, but the programmed information is lost during thermal stress of assembly processes such as soldering or reflow soldering
Solution Approach 1:
The patent applies preliminary action by programming the memory cells to a first resistive state before assembly, then using a first voltage pulse during or after assembly to restore the programmed state. This preliminary programming combined with restoration ensures data is available before mounting while maintaining reliability through thermal stress recovery
Solution Approach 2:
The patent utilizes parameter changes by switching memory cells between different resistive states (first and second states) through controlled voltage pulses. The memory cells are programmed to a first resistive state, then a first voltage pulse restores this state after thermal stress, leveraging resistive state transitions to maintain data integrity
2Productivity
If memory cells are programmed to a low resistance state for data storage, then reading efficiency is improved, but the programmed information becomes unstable under thermal stress during assembly
Solution Approach 1:
The patent applies preliminary anti-action by anticipating the thermal stress effect that would destabilize the low resistance state, and counteracting it with a first voltage pulse that restores the first resistive state after assembly. This pre-planned restoration counteracts the thermal degradation before it permanently affects data integrity
Solution Approach 2:
The patent employs dynamics by making the memory cell states adaptable through voltage pulse application. The system transitions between static resistive states dynamically, allowing the memory to recover from thermal stress-induced changes while maintaining the ability to store and retrieve data efficiently
3Productivity
If standard reflow soldering processes are used for assembly, then manufacturing efficiency is improved, but the thermal stress causes loss of programmed information in resistive memory cells
Solution Approach 1:
The patent converts the harmful thermal stress of reflow soldering into a beneficial process by using the assembly temperature to facilitate the voltage pulse restoration mechanism. The same thermal environment that causes information loss also enables the restoration of the first resistive state through controlled voltage application, turning a disadvantage into an advantage
Solution Approach 2:
The patent maintains manufacturing efficiency by allowing standard reflow soldering processes to proceed while simultaneously applying a first voltage pulse during or after assembly to restore programmed data. This preliminary voltage restoration action ensures information is preserved without requiring modified assembly processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for reliable retention of programmed data after assembly, enabling high integration density and robustness against thermal stress, with reduced power consumption and programming time, by distinguishing pre-programmed cells from unprogrammed ones and adjusting their states accordingly.
Implementation Method 1
electrically modifying the dielectric material so as to electrically bring a plurality of selected cells from the original resistive state (original HRS) to a second resistive state (LRS) in which the resistance of the memory cell is at least twice and preferably ten times lower
Implementation Method 2
assembling said component containing said matrix on a support, during the assembly step the memory cells being subjected to a temperature of at least 240°C
Implementation Method 3
applying to each memory cell a voltage included in said range of read voltages. If the cell has the resistance of the original resistive state (original HRS), deduce that the cell was in the original resistive state (original HRS) after programming and before assembly
Data Source
Figure 1a~1c
Figure 2a~2d
Figure 3a~3c
AI summary
The method involves programming a matrix (300) of resistive non-volatile memory cells (310, 320) by electrically bringing cells from an original resistive state to another resistive state leaving the other memory cells in the original resistive state prior to mounting a component containing the matrix resistive non-volatile memory cells on a support. The matrix is mounted on the support, where the memory cells are subjected to a temperature of 240 degrees Celsius during assembling of the memory cells.