Resistive Memory Preprogramming for Thermal Stability

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Solution Overview

Problem

Current non-volatile resistive memories, such as RRAM, are thermally unstable and cannot retain programmed information during high-temperature assembly processes like reflow soldering, leading to loss of pre-programmed data.

Innovation Solution

A method for preprogramming resistive memory cells by electrically modifying their resistive state from an original high resistance state to a lower resistance state, with an intermediate voltage applied after assembly to maintain or restore the programmed state, ensuring data retention despite thermal stress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If non-volatile resistive memory cells are preprogrammed before assembly, then data retention and manufacturing efficiency are improved, but the programmed information is lost during high-temperature reflow soldering processes

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoiddata retention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by programming the memory cells before assembly in advance, then using a corrective voltage application after assembly to restore any lost programming. This resolves the contradiction by performing the programming action beforehand (improving productivity) while providing a recovery mechanism (maintaining reliability).

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the electrical parameter (voltage) applied to the memory cells after assembly. By applying a specific voltage range that restores conductive filaments damaged during thermal processing, the system recovers data retention without requiring the cells to withstand the thermal stress in their programmed state.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If in situ programming is performed after assembly, then data retention is maintained, but access speed and manufacturing throughput are reduced

Engineering Contradiction:
Improvedata retentionVSAvoidaccess speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent performs the programming action preliminarily before assembly, then applies a quick corrective voltage after assembly. This eliminates the need for slow in situ programming while maintaining data integrity, as the corrective voltage application is much faster than traditional in situ programming methods.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If specialized connection points and interfaces are added for in situ programming, then data can be loaded after assembly, but device complexity increases

Engineering Contradiction:
Improveprogramming capabilityVSAvoidinterface complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent makes the memory cells multi-functional by enabling them to be programmed both before assembly (standard function) and to be restored after assembly (corrective function). This eliminates the need for specialized programming interfaces, as the same memory cells serve both storage and self-recovery purposes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Manufacturing precision

If conductive filaments are formed in the dielectric material, then the memory cell transitions to a lower resistance state, but the state becomes thermally unstable and loses information during welding

Engineering Contradiction:
Improveresistive state controlVSAvoidthermal stability
Core Design Contradiction:
Manufacturing precisionVSStability of the object's composition

Solution Approach 1:

The patent provides beforehand cushioning by preparing the memory cells in a stable original state that can withstand thermal processing, then selectively forming conductive filaments in only those cells that need to be programmed. The corrective voltage application after assembly acts as a safety net to restore any filaments that may have been affected by thermal stress.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The patent changes the electrical parameters (voltage and current) applied to the memory cells at different stages. Before assembly, standard programming voltages are used. After assembly, a specific voltage range is applied to restore conductive filaments. This parameter control allows the system to achieve the desired resistive state while maintaining thermal stability through the recovery process.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method allows for reliable retention of programmed data in resistive memory cells during assembly, maintaining high integration density and extending the lifespan of memory cells under thermal stress, while reducing processing time and eliminating the need for individual cell state verification.

Implementation Method 1

the dielectric material being capable of being modified electrically so as to bring the memory cell from the original resistive state (original HRS) to at least one other resistive state

Methodology Applied
Scientific EffectElectrical modification of dielectric material:

Implementation Method 2

The invention makes it possible to maintain, after assembly, the programming of a matrix of non-volatile resistive memory cells even when the cells have received a significant quantity of heat

Methodology Applied
Scientific EffectThermal stability of programmed state:

Data Source

PatentEP2765575B1Method for programming a non-volatile resistive memory
Publication Date: 2018.12.12 COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
  • EP2765575B1 patent drawingFigure 1a~1c
  • EP2765575B1 patent drawingFigure 2a~2d
  • EP2765575B1 patent drawingFigure 3a~3b

AI summary

The method involves applying an intermediate voltage to memory cells (310, 320) of a matrix (300) of non-volatile resistive memory cells, where the voltage is lower than a range of high value voltages to bring the cells from original resistive state until a second resistive state in which resistance of the cell is twice lower than that of the cell in the original resistive state. The voltage is greater than another range of low value voltages lower than the first range and sufficiently high to bring the cells, which are not in the original resistive state, to the second resistive state.