Resistive Memory Arrays for Parallel Transformer Inference
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional implementations of transformer neural networks are prone to slow inference due to serial processing of weight values, limiting their speed and parallelism in both training and inference operations.
Innovation Solution
Implementing a transformer neural network directly in memory using resistive memory arrays, where weight values are stored and accessed locally, allowing for concurrent computations across multiple memory cells, thereby increasing parallelism and reducing the need for serial data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If transformer neural network is implemented using traditional host-based processing, then flexibility and programmability are maintained, but inference speed is slow due to serial processing of weight values
Solution Approach 1:
The patent replaces the mechanical serial processing system (host CPU/GPU sequentially accessing weight values from memory) with an electrical parallel processing system (resistive memory array performing matrix multiplication through simultaneous current flows). The computational operations are embedded directly into the physical properties of the memory cells, enabling parallel processing of multiple weight values at once through analog electrical signals.
Solution Approach 2:
The resistive memory array serves multiple functions: it acts as both the storage medium for weight values and the computational engine for matrix multiplication. The same memory cells that store data can simultaneously perform arithmetic operations, eliminating the need for separate processing units and enabling the system to handle both storage and computation in a unified parallel architecture.
2Productivity
If weight values are stored in external memory and accessed by host processor, then ease of programming is maintained, but data transfer overhead increases and reduces computational efficiency
Solution Approach 1:
The patent merges the storage function and computation function into a single integrated system. The resistive memory array simultaneously serves as both the weight value storage and the computational processing unit, eliminating the data transfer bottleneck between separate memory and processor components. Weight values remain stored in the memory cells while being directly utilized for computations without external data movement.
Solution Approach 2:
The memory system performs computations using its own stored data without requiring external processing assistance. The resistive memory array inherently performs matrix multiplication operations using the weight values already stored within it, making the system self-sufficient and eliminating dependency on external host processors for computational tasks.
3Reliability
If serial processing is used for weight values, then implementation simplicity is maintained, but inference performance is limited
Solution Approach 1:
The patent changes the operational parameter from digital serial processing to analog parallel processing. By utilizing the continuous resistance values of memory cells and analog electrical signals for computation, the system achieves parallel processing capability. The resistance of each memory cell represents a weight value, and simultaneous application of input voltages across multiple cells produces parallel computational results through current summation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the speed and efficiency of transformer neural network operations by enabling parallel processing of computations within the memory device, improving both training and inference performance.
Implementation Method 1
The resistive memory array can comprise resistive memory cells. The resistive memory cells can be utilized to perform computations used to implement a transformer neural network.
Data Source
AI summary
Apparatuses and methods can be related to implementing a transformer neural network in a memory. A transformer neural network can be implemented utilizing a resistive memory array. The memory array can comprise programmable memory cells that can be programed and used to store weights of the transformer neural network and perform operations consistent with the transformer neural network.


