Resistive Memory Cell Transistor Interface State Programming

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Solution Overview

Problem

Resistive memory devices face challenges in maintaining consistent resistance distribution across memory cells, leading to reduced sensing margins and data accuracy due to unequal series resistance values, which complicates the writing and reading of data.

Innovation Solution

The solution involves programming cell transistors with unequal interface states to compensate for the unequal series resistance provided by resistive memory elements, using methods like hot-carrier injection and Fowler-Nordheim tunneling, and adjusting the interface states of cell transistors to ensure equal combined series resistance across memory cells, thereby stabilizing resistance distribution and enhancing data sensing margins.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If resistive memory elements are used to store data, then nonvolatile storage capability is achieved, but unequal series resistance values occur leading to reduced sensing margins

Engineering Contradiction:

Improvedata retentionVSAvoidsensing margin

Core Design Contradiction:

Duration of action of stationary objectVSMeasurement precision

Solution Approach 1:

The patent changes the electrical parameters of cell transistors by programming them with different interface states (different threshold voltages) to compensate for the unequal resistance values of resistive memory elements. This parameter adjustment equalizes the combined series resistance across all memory cells, thereby improving sensing margins while maintaining nonvolatile data retention capability.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent implements a feedback mechanism where the resistance characteristics of resistive memory elements are measured or characterized, and then cell transistor interface states are adjusted based on this information. This closed-loop approach ensures that variations in memory element resistance are compensated, maintaining consistent sensing margins across all memory cells.

Inventive Principle:

Principle #23Feedback

2Stability of the object's composition

If cell transistors are programmed with equal interface states, then uniform transistor characteristics are achieved, but resistance distribution variations in memory elements cause unequal combined series resistance

Engineering Contradiction:

Improvetransistor characteristic uniformityVSAvoidcombined series resistance consistency

Core Design Contradiction:

Stability of the object's compositionVSManufacturing precision

Solution Approach 1:

The patent applies local quality by programming each cell transistor with a specific interface state tailored to its particular memory element's resistance characteristics. Instead of uniform programming, each transistor receives customized programming to compensate for local variations in its associated resistive memory element, achieving consistent combined series resistance across all memory cells.

Inventive Principle:

Principle #3Local quality

3Measurement precision

If additional programming steps are added to adjust interface states, then resistance distribution is compensated and sensing margins are improved, but device complexity and programming time increase

Engineering Contradiction:

Improvesensing marginVSAvoidprogramming operation complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The patent performs preliminary programming of cell transistor interface states during the initial memory cell formation or early operation phases. By establishing the appropriate interface states in advance, the system prepares the transistors to automatically compensate for resistance variations during normal operation, reducing the need for complex real-time adjustments and simplifying the overall programming process.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively compensates for resistance distribution variations, improving data sensing margins and ensuring accurate data writing and reading in resistive memory devices by adjusting the interface states of cell transistors to achieve balanced resistance values.

Implementation Method 1

programming the first and second cell transistors with unequal levels of interface states via at least one of hot-carrier injection and Fowler-Nordheim (F-N) tunneling

Methodology Applied

Scientific EffectHot-carrier injection:

Implementation Method 2

programming the first and second cell transistors with unequal levels of interface states via at least one of hot-carrier injection and Fowler-Nordheim (F-N) tunneling

Methodology Applied

Scientific EffectFowler-Nordheim tunneling:

Data Source

PatentUS9378815B2Resistive memory device capable of increasing sensing margin by controlling interface states of cell transistors

Publication Date: 2016.06.28 SAMSUNG ELECTRONICS CO LTD

AI summary

A resistive memory device includes a memory cell array having a plurality of memory cells therein, which operate in response to word line driving and column selecting signals. Each of memory cells includes a resistive device and a cell transistor connected in series. An I/O sense amplifier senses and amplifies data output from the memory cell array to thereby generate output data, and also generate program current based on input data and provide the program current to the memory cell array. The resistive memory device is also configured to read output data from the I/O sense amplifier and adjust interface states of the cell transistors based on a voltage level of the output data during a test mode.