Resistive Memory Reference Voltage Adjustment for Read Errors
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Solution Overview
Problem
Resistive memory devices face challenges in reducing errors during data read operations due to the dispersion of resistance states, particularly with high and low resistance states not being distinctly differentiated, leading to increased read latency and error occurrence.
Innovation Solution
The method involves setting reference voltages such that the difference between voltages used to determine a high resistance state is greater than the difference used to determine a low resistance state, allowing for accurate differentiation and reduction of errors by reflecting the dispersion of resistance states, thereby reducing read errors and latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If uniform reference voltage intervals are used for reading multi-level memory cells, then the read circuit design is simplified, but resistance state dispersion causes increased read errors and reduced measurement precision
Solution Approach 1:
The patent applies parameter changes by adjusting the reference voltage intervals dynamically based on the resistance state being read. Specifically, the reference voltage difference is set to be larger when reading high resistance states and smaller when reading low resistance states. This adaptive parameter adjustment optimizes the differentiation precision for each resistance state while maintaining manageable circuit complexity through a systematic voltage selection approach.
2Measurement precision
If reference voltage differences are increased to improve high resistance state differentiation, then measurement precision for high resistance states improves, but error occurrence increases for low resistance state differentiation
Solution Approach 1:
The patent implements local quality by applying different reference voltage interval characteristics to different resistance state reading operations. Instead of using a uniform reference voltage scheme, the system selectively applies larger voltage intervals for high resistance state differentiation and smaller voltage intervals for low resistance state differentiation. This localized optimization ensures that each resistance state is read with the most appropriate voltage differential, thereby maintaining both high measurement precision and reliability across all states.
3Reliability
If multiple read operations with different reference voltages are performed to reduce errors, then read accuracy improves, but read latency increases
Solution Approach 1:
The patent applies preliminary action by pre-determining the optimal reference voltage intervals for each resistance state before the actual read operation. The system establishes a lookup table or predefined voltage scheme that maps each resistance state to its optimal reference voltage differential. During the read operation, the appropriate reference voltage is selected and applied immediately, eliminating the need for iterative adjustments or multiple read attempts. This preliminary preparation significantly reduces read latency while maintaining high read accuracy.
Data Source
AI summary
A method is for operating a resistive memory system including a resistive memory device implemented as multi-level memory cells. The method includes setting levels of reference voltages used to determine resistance states of the multi-level memory cells, and reading data of the multi-level memory cells based on the reference voltages. A difference between the reference voltages used to determine a relatively high resistance state is greater than a difference between the reference voltages used to determine a relatively low resistance state.