Resistive Memory Voltage Equalizer for Leakage Reduction
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Solution Overview
Problem
Resistive memory devices face challenges in maintaining stable voltage levels between data input/output lines and source lines during inactive states, leading to potential data errors and leakage currents, which are not effectively addressed by existing technologies.
Innovation Solution
The implementation of an equalizer and sub-equalizers that selectively connect the data input/output line, source line, and control line to achieve the same voltage level without an external power supply, and the use of a clamper to set optimal voltage levels, ensuring stable operation and preventing data errors and leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the resistive memory device operates during inactive states without voltage equalization, then the device structure remains simple, but voltage level differences between data input/output lines and source lines cause data errors and leakage currents
Solution Approach 1:
The equalizer is activated before the memory cell enters the inactive state to pre-establish equal voltage levels between the data input/output line and source line. This preliminary equalization prevents voltage level differences that would otherwise cause data errors and leakage currents during the inactive state, without requiring continuous complex control circuits.
Solution Approach 2:
The equalizer circuit uses the existing power supply voltage and internal switching elements to automatically equalize the voltage levels between lines. The circuit self-regulates by detecting voltage differences and activating the equalizer, eliminating the need for external control signals or additional power supply circuits, thus maintaining device simplicity while improving reliability.
2Reliability
If additional equalizing circuits are added to maintain voltage levels, then data errors and leakage currents are reduced, but the device complexity and manufacturing cost increase
Solution Approach 1:
The equalizer circuit is integrated with the existing memory cell structure by sharing power supply lines, ground lines, and control logic with the read/write circuits. The switching elements of the equalizer are combined with the access transistor structure, eliminating the need for separate dedicated equalizing circuits and reducing overall device complexity while maintaining voltage stability.
Solution Approach 2:
The equalizer circuit serves multiple functions: it equalizes voltage levels between data input/output lines and source lines, prevents leakage currents during inactive states, and prepares the circuit for subsequent read/write operations. This multi-functionality reduces the need for separate specialized circuits, thereby reducing device complexity while improving voltage stability.
Data Source
AI summary
Provided is a semiconductor resistive memory device. The resistive memory device includes a plurality of unit cells. A source line and a data input/output line of the unit cells may be selectively connected to have a substantially same voltage level for equalization when the unit cells are in inactive or unselected state. The equalization may decrease current consumption and protect write error, and protect leakage current.