Resistive Memory Pillar Fabrication via Oblique Sputtering
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Solution Overview
Problem
Current methods for etching materials used in non-volatile memory technologies, such as MRAM, OxRAM, and CBRAM, face challenges including excessive reactivity, dimensional control issues, and structural defects, leading to variability in electrical and retention properties, particularly at resolutions below 30 nm.
Innovation Solution
A manufacturing method involving the deposition of a conductive layer, formation of conductive pillars with flared shapes, and subsequent deposition of storage elements using non-collimated cathodic sputtering with oblique incidence to minimize etching and reduce defects, allowing for discrete layer deposition without post-etching, thereby reducing variability and corrosion risks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If reactive plasma etching is used to etch memory materials, then etching speed is improved, but dimensional control deteriorates and material properties are modified
Solution Approach 1:
The patent changes the etching parameters by using ion beam etching with specific ion energy (50-200 eV) and angle (30-60 degrees) to achieve better dimensional control while maintaining acceptable etching speed. This parameter optimization resolves the contradiction between etching speed and dimensional control.
Solution Approach 2:
The patent replaces reactive plasma etching with ion beam etching, substituting a chemical-based process with a physical-based process. This substitution eliminates the harmful chemical reactions that cause dimensional control issues and material property modifications while maintaining etching efficiency.
2Manufacturing precision
If ion beam etching is used to etch storage elements, then etching precision is improved, but structural defects increase and variability worsens
Solution Approach 1:
The patent optimizes ion beam etching parameters including ion energy (50-200 eV), incidence angle (30-60 degrees), and process temperature to minimize structural defects. These parameter changes reduce edge damage and variability while maintaining etching precision.
Solution Approach 2:
The patent introduces a protective capping layer deposited on the storage elements before ion beam etching. This intermediary layer protects the etched structures from ion beam damage, reducing structural defects and variability while allowing precise etching to proceed.
3Manufacturing precision
If etching is used to form storage elements, then structural definition is improved, but material corrosion increases
Solution Approach 1:
The patent replaces reactive plasma etching with ion beam etching, substituting a chemical corrosion-based process with a physical sputtering-based process. This substitution maintains structural definition while eliminating material corrosion caused by reactive plasma chemistry.
Solution Approach 2:
The patent uses a protective capping layer as an intermediary between the ion beam and the storage element materials. This layer enables precise structural definition through ion beam etching while preventing direct corrosion of the sensitive memory materials.
4Manufacturing precision
If IBE-etched structures are formed, then etching quality is improved, but side wall deposits alter electrical properties
Solution Approach 1:
The patent introduces a protective capping layer as an intermediary that prevents ion beam-induced deposits from forming on the side walls of etched structures. This intermediary layer maintains etching quality while preventing electrical property alterations caused by metallic deposits.
Solution Approach 2:
The patent optimizes ion beam etching parameters including reducing ion energy to 50-200 eV and controlling incidence angle to 30-60 degrees. These parameter changes reduce the extent of side wall deposits while maintaining acceptable etching quality, thereby preserving electrical properties.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in resistive devices with reduced variability in electrical and retention properties, improved dimensional control, and minimized structural defects, enhancing the reliability and performance of memory points and logic units.
Implementation Method 1
deposit a first layer by non-collimated cathodic sputtering under normal incidence relative to the substrate; and depositing by sputtering a second layer on the first layer
Data Source
Figure 1~3
Figure 4A~4D
Figure 4E~4G
AI summary
The invention relates to a method for manufacturing a resistive device, comprising the following steps: depositing a first electrically conductive layer on a substrate; forming an engraving mask on the first conductive layer; engraving the first conductive layer through the mask, such as to obtain a plurality of electrically conductive pillars (110) separated from one another; and forming storage elements with variable electrical resistance at the tops of the conductive pillars (110), such that each storage element is supported by one of the conductive pillars, the step of forming the storage elements comprising the following operations: depositing a first layer (121) by non-collimated cathode sputtering at normal incidence relative to the substrate; and depositing a second layer on the first layer by cathode sputtering, the second layer comprising a first pulverised chemical species at oblique incidence.