Resistive Processing Unit Weight Extraction via Analog Matrix-Vector Multiplication

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Solution Overview

Problem

Existing analog resistive processing systems for neuromorphic computing face challenges in accurately extracting weight values from resistive memory arrays due to hardware non-idealities such as offsets and noise.

Innovation Solution

The system employs a processor coupled with a resistive processing unit (RPU) that includes an array of cells with programmable resistive devices. A weight extraction process is performed by applying input vectors for analog matrix-vector multiplication, obtaining output vectors, and determining weight values using these vectors, while compensating for hardware non-idealities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If weight values are extracted directly from resistive memory array, then extraction process is simple, but measurement precision is poor due to hardware non-idealities

Engineering Contradiction:
Improveweight value extraction accuracyVSAvoidweight extraction process complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary weight extraction process that uses input vectors and output vectors as mediators between the resistive memory array and the final weight values. Instead of directly reading weights from the array, the system applies input vectors to the array, measures output vectors, and computationally derives weight values from these measurements, thereby achieving higher precision while managing complexity through structured intermediate steps

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements feedback by using measured output vectors to computationally determine accurate weight values. The system continuously refines weight extraction by comparing expected outputs with actual measurements and adjusting the extracted weight values accordingly, creating a closed-loop feedback mechanism that improves measurement precision despite hardware non-idealities

Inventive Principle:
Principle #23Feedback

2Productivity

If analog matrix-vector multiplication is performed, then computational speed is improved, but measurement precision deteriorates due to noise and offsets

Engineering Contradiction:
Improvecomputational speedVSAvoidweight value accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent uses feedback to compensate for analog computation errors. By measuring actual output vectors from the analog matrix-vector multiplication and using these measurements to computationally determine weight values, the system creates a feedback loop that corrects for noise and offset errors accumulated during high-speed analog processing

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces output vectors as intermediaries between the analog computation process and the final weight values. These output vectors serve as measurable quantities that bridge the gap between fast analog computation and precise digital weight extraction, allowing the system to maintain high computational speed while achieving accurate weight determination through subsequent computational processing

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables accurate extraction of weight values from RPU arrays, effectively addressing hardware non-idealities and ensuring precise numerical computations in neuromorphic computing systems.

Implementation Method 1

The cells respectively comprise resistive devices, wherein at least a portion of the resistive devices are programmable to store weight values of a given matrix in the array of cells

Methodology Applied
Scientific EffectResistive memory effect: Electrical Resistance

Implementation Method 2

applying a set of input vectors to the resistive processing unit to perform analog matrix-vector multiplication operations on the stored matrix, obtaining a set of output vectors resulting from the analog matrix-vector multiplication operations

Methodology Applied
Scientific EffectAnalog computation through resistive multiplication: Electrical Resistance

Data Source

PatentUS12314844B2Extraction of weight values in resistive processing unit array
Publication Date: 2025.05.27 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US12314844B2 patent drawing
  • US12314844B2 patent drawing
  • US12314844B2 patent drawing

AI summary

A system includes a processor, and a resistive processing resistive processing unit coupled to the processor. The resistive processing unit includes an array of cells, wherein the cells respectively include resistive devices, wherein at least a portion of the resistive devices are programmable to store weight values of a given matrix in the array of cells. When the given matrix is stored in the array of cells, the processor is configured to perform a weight extraction process. The weight extraction process applies a set of input vectors to the resistive processing unit to perform analog matrix-vector multiplication operations on the stored matrix, obtains a set of output vectors resulting from the analog matrix-vector multiplication operations, and determines weight values of the given matrix stored in the array of cells utilizing the set of input vectors and the set of output vectors.