Resistive RAM Logic Cells for Non-Volatile Low-Power Computing

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Solution Overview

Problem

Traditional logic gates in semiconductor devices are inefficient in low power applications due to their volatile nature, requiring continuous electrical power to maintain their state, which is not feasible in finite or battery-powered devices.

Innovation Solution

A non-volatile resistive random access memory (RAM) logic device is developed, utilizing resistance switching RAM cells that can be programmed into low or high resistance states, with a shared output node to determine logical outputs, allowing for efficient storage and retrieval of data without the need for continuous power.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If traditional volatile logic gates are used, then logical operations can be performed, but continuous electrical power is required to maintain the state

Engineering Contradiction:
Improvepower consumptionVSAvoiddata retention without power
Core Design Contradiction:
Use of energy by stationary objectVSReliability

Solution Approach 1:

The patent changes the operational parameter from volatile electrical states to non-volatile resistance states. The resistive memory cells maintain their logical state through physical resistance changes that persist without power, eliminating the need for continuous refreshing while preserving data retention capability.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the traditional electrical field-based logic gate mechanism with a resistive memory-based mechanism. Instead of using capacitive charge storage that requires continuous power maintenance, the system uses resistance switching that inherently maintains state without power, substituting one physical mechanism for another more efficient one.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Use of energy by stationary object

If resistive memory cells are used for logic operations, then power consumption is reduced, but the device structure becomes more complex

Engineering Contradiction:
Improvepower consumptionVSAvoidcircuit structure
Core Design Contradiction:
Use of energy by stationary objectVSDevice complexity

Solution Approach 1:

The patent makes the resistive memory cells multi-functional by enabling them to perform both traditional memory storage and logic gate operations. The same physical cells can be configured through voltage pulse application to implement AND, OR, NOT, and other logic functions, eliminating the need for separate logic gate circuitry and reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the functions of memory storage and logic operations into a single integrated structure. By combining multiple resistive memory cells with shared read/write lines and control circuitry, the system achieves both data retention and logical processing capabilities within one unified device architecture.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables low power consumption and efficient data storage and retrieval, making it suitable for battery-powered devices and mixed logic and memory applications, while maintaining data integrity even without applied power.

Implementation Method 1

each of the pair of resistance switching RAM cells may be independently programed into at least a low resistance state or a high resistance state

Methodology Applied
Scientific EffectResistive switching: Electrical Resistance

Data Source

PatentUS11600325B2Non volatile resistive memory logic device
Publication Date: 2023.03.07 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11600325B2 patent drawing
  • US11600325B2 patent drawing
  • US11600325B2 patent drawing

AI summary

A resistance switching RAM logic device is presented. The device includes a pair of resistance switching RAM cells that may be independently programed into at least a low resistance state (LRS) or a high resistance state (HRS). The resistance switching RAM logic device may further include a shared output node electrically connected to the pair of resistance switching RAM cells. A logical output may be determined from the programmed resistance state of each of the resistance switching RAM cells.