Semiconductor Resistor Fabrication via Gate Stack Segmentation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In semiconductor device fabrication, particularly in advanced technology nodes like 32 nm, resistors with high resistance values are challenging to manufacture due to the low resistance caused by metal layers in the gate stack, requiring additional processing steps and complexity.
Innovation Solution
A method of fabricating resistors by forming a transistor material stack, patterning it to create recessed regions, and removing the metal layer using a pre-cleaning process, allowing for the formation of semiconductive material in these regions without additional lithography steps, resulting in resistors with higher resistance values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal layer is included in the gate stack for transistors, then transistor performance is improved, but resistor resistance value becomes too low for RF applications
Solution Approach 1:
The gate stack is segmented into transistor regions (with metal layer) and resistor regions (without metal layer). The metal layer is selectively removed in resistor regions through patterned etching, allowing transistors to retain the metal layer for performance while resistors achieve higher resistance values by eliminating the low-resistance metal path.
Solution Approach 2:
Different structural qualities are applied to different regions: transistor regions maintain the complete gate stack with metal layer for optimal transistor performance, while resistor regions have the metal layer removed to achieve higher resistance. This local differentiation allows both functions to coexist on the same chip.
2Manufacturing precision
If the metal layer is removed in the resistor region, then resistor resistance value increases, but an additional masking level and lithography process is required
Solution Approach 1:
The resistor fabrication process is merged with the existing transistor gate formation process. The same lithography masks and etching steps used to define transistor gates are simultaneously used to define resistor regions and remove the metal layer, eliminating the need for additional masking levels and lithography processes.
Solution Approach 2:
The transistor gate formation process is made multi-functional, serving both to create transistor gates and to define resistor regions by selective metal layer removal. This universal process approach allows a single set of lithography masks to accomplish multiple objectives.
Data Source
AI summary
A semiconductor device includes a semiconductor body of a first semiconductive material. A transistor is disposed in the semiconductor body. The transistor includes source and drain regions of a second semiconductive material embedded in the semiconductor body. A resistor overlies a top surface of the semiconductor body and is laterally spaced from the transistor. The resistor is formed from the second semiconductive material.