Resolver Signal Conditioning with Shared A/D Conversion Accuracy
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Solution Overview
Problem
Conventional resolver interfaces face challenges in achieving accurate signal conditioning due to inherent inaccuracies in separate components and errors caused by analog-to-digital converters, which affect the accuracy of rotational position measurement.
Innovation Solution
A resolver interface with separate anti-aliasing filters for sine and cosine signals, time-sharing multiplexed to a single A/D converter, controlled by a field programmable gate array (FPGA) for synchronized digital demodulation and filtering, minimizing errors and ensuring accurate quadrature phase results.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate A/D converters are used for sine and cosine signals, then signal conversion can be performed independently, but device complexity and potential for differential errors increase
Solution Approach 1:
The patent merges the A/D conversion function into a single shared converter that processes both sine and cosine signals sequentially through time-division multiplexing. This eliminates the need for separate A/D converters, reducing device complexity while maintaining signal conversion reliability through synchronized sampling controlled by the FPGA.
Solution Approach 2:
The single A/D converter is designed to serve multiple functions by converting both sine and cosine signals as well as the excitation signal through time-shared operation. This universal converter approach reduces the total number of components while maintaining the ability to accurately convert all required signals.
2Measurement precision
If separate digital filters are used for sine and cosine signals, then filtering can be optimized independently, but manufacturing precision and component matching become more difficult
Solution Approach 1:
The patent implements identical digital filter algorithms for both sine and cosine signal processing within the FPGA. By copying the same filtering logic and parameters for both channels, the system achieves consistent filtering precision without the manufacturing and calibration challenges of designing and matching separate analog filter components.
3Measurement precision
If analog signal conditioning is performed separately for sine and cosine, then signal processing can be independent, but accuracy is reduced due to component variations and drift
Solution Approach 1:
The patent replaces separate analog signal conditioning circuits with a unified digital signal processing architecture implemented in FPGA. By performing all signal conditioning operations (filtering, demodulation, calculation) in the digital domain using identical algorithms for both sine and cosine channels, the system eliminates accuracy degradation from analog component variations while maintaining processing independence through software-based channel separation.
Data Source
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AI summary
A resolver interface (10) includes separate anti-aliasing filters (20, 22) for sine and cosine signals. The separately filtered signals are then time share multiplexed (26) to a single analog to digital (A/D) converter (28). Because all of the inputs are fed through the same A/D converter, any error, difference or shift caused by the A/D converter is shared across all of the inputs. A Field Programmable Gate Array (FPGA) (30) and processor (38) are used to digitally filter (34), demodulate (36) and compute position (46).