Resonant Clock Domain Boundary Inductors for Skew Control

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Solution Overview

Problem

Resonant clocking circuits face challenges due to inaccuracies in predicting inductor design and variations in inductance during operation, leading to significant clock skew issues across multiple domains in high-performance digital circuits.

Innovation Solution

Connecting inductors to the clock mesh branches at the boundary between resonant clock domains allows for shared inductors, reducing the need for precise matching and mitigating skew caused by design and runtime inaccuracies, thereby simplifying the system and improving clock synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If inductors are placed within each resonant clock domain, then each domain can operate independently, but clock skew increases due to inductor design inaccuracies and variations

Engineering Contradiction:
Improveclock skew controlVSAvoidinductor design accuracy
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent merges multiple resonant clock domains by placing a single inductor at the boundary between domains rather than having separate inductors within each domain. This shared inductor configuration allows current to flow across domain boundaries, averaging out the effects of inductor design inaccuracies and reducing clock skew variations across the network.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If multiple inductor sizes are used to compensate for design inaccuracies, then clock skew can be reduced, but device complexity increases

Engineering Contradiction:
Improveclock skew controlVSAvoidinductor design palette
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements universality by using a single inductor configuration that serves multiple resonant clock domains simultaneously. This shared inductor approach allows one inductor design to function across multiple domains, eliminating the need for multiple specialized inductor sizes and reducing overall device complexity while maintaining clock skew control.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If inductor design is simplified with fewer size options, then manufacturing becomes easier, but clock skew control deteriorates

Engineering Contradiction:
Improveinductor design simplificationVSAvoidclock skew control
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent uses the clock mesh branch as an intermediary medium that connects resonant clock domains through a shared inductor. This intermediary configuration allows current to flow between domains, effectively averaging out timing differences and enabling simplified inductor design to achieve acceptable clock skew control without requiring complex multi-size inductor libraries.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces clock skew by averaging current flow and tolerating mismatches, allowing a smaller palette of inductor sizes and reducing the impact of environmental noise on inductance, thus enhancing energy efficiency and timing margins in resonant clock networks.

Implementation Method 1

a resonant clocking circuit requires an inductor (L) with an instantiated capacitor (C) or parasitic capacitance of the clock network to form an LC circuit

Methodology Applied
Scientific EffectLC resonance: Resonance

Data Source

PatentUS8975936B2Constraining clock skew in a resonant clocked system
Publication Date: 2015.03.10 ADVANCED MICRO DEVICES INC
  • US8975936B2 patent drawing
  • US8975936B2 patent drawing
  • US8975936B2 patent drawing

AI summary

An integrated circuit includes a plurality of resonant clock domains of a resonant clock network. Each resonant clock domain has at least one clock driver that supplies a portion of clock signal to an associated resonant clock domain. The resonant clock network operates in a resonant mode with inductors connected to pairs of resonant clock domains at boundaries between the resonant clock domains. Each inductor forms an LC circuit with clock load capacitance in the pair of resonant clock domains to which the inductor is connected.