Resonant Clock Grid Switching for Wide-Bandwidth Frequency Scaling

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Solution Overview

Problem

In synchronous digital systems, clock distribution networks face challenges due to increased line resistance from technology scaling, leading to power consumption issues and performance limitations, particularly in resonant clocking modes, where sudden changes in load cause disruptions to the clock waveform and require optimal buffer adjustments.

Innovation Solution

A wide bandwidth resonant clock distribution mechanism using multiple parallel inductors dynamically switched with tunable resistance switches and capacitor networks, allowing for programmable resonant and non-resonant modes based on clock signal frequency, with a programmable sector buffer for adjusting latency and slew rate, and a long, thin inductor structure to minimize disruption to the power supply grid.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If resonant clock distribution is used to save power, then global clock power is reduced by up to 50%, but the bandwidth is limited and cannot accommodate modern processor frequency ranges

Engineering Contradiction:
Improveglobal clock powerVSAvoidfrequency range bandwidth
Core Design Contradiction:
Loss of energyVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic switching between resonant and non-resonant clock distribution modes using controllable switches. The system can transition between modes based on frequency requirements, allowing the clock distribution network to adapt its characteristics in real-time rather than being fixed in a single mode.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the resonant frequency parameter of the clock distribution network by switching between different capacitor configurations and resonant modes. This allows the system to adjust its operating frequency range while maintaining power efficiency where applicable.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If planar spiral inductors are used to provide inductance for resonant clocking, then resonant mode operation is enabled, but disruption to the power supply grid increases

Engineering Contradiction:
Improveresonant clocking capabilityVSAvoidpower supply grid disruption
Core Design Contradiction:
Use of energy by moving objectVSObject-affected harmful factors

Solution Approach 1:

The patent uses long thin inductor structures instead of traditional planar spiral inductors. This changes the local geometry and distribution of the inductor to minimize its impact on the power supply grid while maintaining the necessary inductance value for resonant operation.

Inventive Principle:
Principle #3Local quality

3Reliability

If clock distribution networks use traditional buffering approaches, then signal distribution is achieved, but power consumption increases and performance is limited by line resistance

Engineering Contradiction:
Improvesignal distribution reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent employs dynamically controllable sector buffers that can be adjusted or disabled based on operating conditions. This dynamic control allows the system to optimize power consumption while maintaining reliable signal distribution, particularly when transitioning between resonant and non-resonant modes.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution achieves significant power savings, up to 50% reduction in global clock power, while maintaining clean clock waveforms and preventing catastrophic race conditions, by dynamically adjusting the resonant frequency and buffer settings to accommodate varying processor frequencies and sector loads.

Implementation Method 1

at least one inductor, at least one tunable resistance switch, and a capacitor network. The inductor, tunable resistance switch, and capacitor network are connected between the clock grid and a reference voltage

Methodology Applied
Scientific EffectResonance: Resonance

Data Source

PatentUS8704576B1Variable resistance switch for wide bandwidth resonant global clock distribution
Publication Date: 2014.04.22 GLOBALFOUNDRIES US INC
  • US8704576B1 patent drawing
  • US8704576B1 patent drawing
  • US8704576B1 patent drawing

AI summary

A wide bandwidth resonant clock distribution comprises a clock grid configured to distribute a clock signal to a plurality of components of an integrated circuit, at least one inductor, at least one tunable resistance switch, and a capacitor network. The inductor, tunable resistance switch, and capacitor network are connected between the clock grid and a reference voltage. The at least one tunable resistance switch is programmable to dynamically switch the at least one inductor in or out of the clock distribution to effect at least one resonant mode of operation or a non-resonant mode of operation based on a frequency of the clock signal.