Retention Check Logic for Non-Volatile Memory Cells
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Solution Overview
Problem
As memory cell sizes in non-volatile flash memory devices decrease, charge retention and data retention suffer due to charge leakage, leading to reliability issues as threshold voltages drift over time, affecting the margin for successful reading of memory cells.
Innovation Solution
Incorporating retention check logic in the controller of a non-volatile memory device to identify memory cells in a higher threshold state that fail a retention check and implementing a retention write process to increase the threshold voltage of these cells, thereby improving data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cell sizes are reduced to increase storage capacity, then storage density is improved, but charge retention deteriorates due to charge leakage
Solution Approach 1:
The system performs preliminary detection of memory cells with degraded threshold voltages before data becomes unreadable. By identifying cells with threshold voltages below the read bias during standby mode and proactively reprogramming them, the system prevents data loss before it occurs, rather than waiting for actual read failures.
Solution Approach 2:
The retention check logic continuously monitors the threshold voltage distribution of memory cells and provides feedback to the controller. When cells with threshold voltages below the read bias are detected, the system triggers a reprogramming operation to restore proper threshold levels, creating a closed-loop feedback mechanism that maintains data integrity.
2Reliability
If retention check logic is added to detect memory cells with degraded threshold voltages, then data retention is improved, but device complexity increases
Solution Approach 1:
The retention check logic and reprogramming capability are integrated directly into the memory device controller, allowing the device to autonomously detect and correct its own threshold voltage degradation without requiring external intervention. The controller performs standby reads, identifies problematic cells, and executes reprogramming operations independently.
Solution Approach 2:
The retention check logic is combined with the existing controller functionality, merging the detection and correction mechanisms into a single integrated unit. This approach avoids adding separate complex external monitoring systems and leverages the existing controller infrastructure to perform retention monitoring and repair operations.
3Reliability
If threshold voltage is increased through reprogramming to correct charge leakage, then data retention is improved, but energy consumption increases
Solution Approach 1:
The retention check operation is performed periodically during standby mode at predetermined intervals rather than continuously or on-demand. This periodic monitoring approach balances the need for detecting threshold voltage degradation with the consumption of energy during check and reprogramming operations, optimizing the trade-off between reliability and power usage.
Data Source
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AI summary
An integrated circuit memory device includes an array of non-volatile, charge trapping memory cells, configured to store data values in memory cells in the array using threshold states, including a higher threshold state characterized by a minimum threshold exceeding a selected read bias. A controller includes a stand-by mode, a write mode and a read mode. Retention check logic executes on power-up, or during the stand-by mode, to identify memory cells in the higher threshold state which fail a threshold retention check. Also, logic is provided to reprogram the identified memory cells.