Reverse-Cut Source/Drain Contacts for Short-Resistant Isolation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As semiconductor integrated circuits (ICs) scale down, the isolation between adjacent source/drain (S/D) contacts becomes increasingly challenging, leading to potential short-circuit defects due to the peeling of narrow etch masks during the etching process, which merges contact holes and causes S/D contacts to be accidentally shorted.

Innovation Solution

The method involves forming one or more plugging dielectric layers where S/D contacts are designed to be separated, using a patterned mask and these dielectric layers collectively as an etch mask to prevent hard mask peeling and ensure proper isolation between S/D contacts during the etching process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If scaling down is continued to increase functional density, then production efficiency increases and costs lower, but isolation among adjacent source/drain contacts deteriorates leading to short-circuit defects

Engineering Contradiction:
Improveproduction efficiencyVSAvoidisolation among adjacent source/drain contacts
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by forming plugging dielectric layers in isolation regions between adjacent source/drain contacts before the etching process. These pre-formed dielectric plugs act as protective barriers that prevent accidental merging of contact holes during subsequent etching operations, thereby maintaining isolation reliability while enabling continued scaling down for higher productivity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The plugging dielectric layers serve as intermediary structures between adjacent source/drain contacts. These dielectric plugs mediate the isolation by physically separating the contact holes and preventing direct contact or merging, thus resolving the contradiction between scaling down for productivity and maintaining isolation for reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If conventional etching is used to form contact holes, then manufacturing process is simple, but accidental merging of contact holes occurs leading to short-circuit defects

Engineering Contradiction:
Improveetching process simplicityVSAvoidcontact hole isolation precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The plugging dielectric layers are formed in advance before etching, creating pre-defined isolation barriers. This preliminary structure guides the etching process and prevents merging of contact holes, maintaining manufacturing precision without significantly complicating the overall manufacturing process

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The plugging dielectric layers are formed as temporary protective structures during the contact hole formation process. After serving their isolation function during etching, these dielectric plugs are removed or integrated into the final device structure, providing a cost-effective solution that maintains precision without requiring complex permanent isolation mechanisms

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS20230420566A1Semiconductor device with reverse-cut source/drain contact structure and method thereof
Publication Date: 2023.12.28 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20230420566A1 patent drawing
  • US20230420566A1 patent drawing
  • US20230420566A1 patent drawing

AI summary

A method includes providing a structure having gate structures, source/drain electrodes, a first etch stop layer (ESL), a first interlayer dielectric (ILD) layer, a second ESL, and a second ILD layer. The method includes forming a first etch mask; performing a first etching to the second ILD layer, the second ESL, and the first ILD layer through the first etch mask to form first trenches; depositing a third dielectric layer into the first trenches; forming a second etch mask; and performing a second etching to the second ILD layer, the second ESL, the first ILD layer, and the first ESL through the second etch mask, thereby forming second trenches, wherein the second trenches expose some of the source/drain electrodes, and the third dielectric layer resists the second etching. The method further includes depositing a metal layer into the second trenches.