Integrated RF Circuit Card with Tile Architecture
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Solution Overview
Problem
Current phased array antennas are costly, large, and heavy, limiting their deployment in various applications due to high production costs and complex fabrication processes, which also degrade RF performance and restrict their use in radar and communication systems.
Innovation Solution
A modular, scalable RF circuit card array assembly with a tile architecture that integrates RF circulators, monolithic microwave integrated circuits (MMICs), and thermal management systems on a printed circuit board (PCB) to reduce size, weight, and cost while maintaining high performance, using standard PWB manufacturing processes and commercially available materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If PTFE based materials are used for multilayer PWB fabrication, then favorable RF characteristics are achieved, but multiple process step-cycles and back-drill operations are required resulting in high cost and degraded RF performance
Solution Approach 1:
The patent divides the PWB into separate RF and non-RF sections, allowing different fabrication processes for each section. The RF section uses PTFE material without back-drilling, while non-RF sections can undergo standard back-drill operations, thus maintaining RF performance while enabling cost-effective manufacturing.
Solution Approach 2:
The patent extracts the back-drilling operation from the RF signal path by routing RF vias to terminate at the RF section boundary without extending through the entire PWB thickness. This eliminates the need for back-drilling in the RF section, avoiding the associated costs and performance degradation while still allowing non-RF sections to be back-drilled.
2Ease of manufacture
If LTCC based materials are used for multilayer PWB fabrication, then single lamination step is achieved, but processing is limited to small panel sizes and RF performance is degraded
Solution Approach 1:
The patent merges the advantages of both PTFE and LTCC approaches by using PTFE for the RF section (achieving excellent RF performance and large panel capability) while using LTCC for the non-RF section (enabling single lamination step and integrated passive components), thus combining the benefits of both materials in a hybrid structure.
3Reliability
If conventional phased array antennas are deployed, then RF performance is maintained, but size, weight, and cost increase significantly
Solution Approach 1:
The patent transitions from a conventional three-dimensional phased array structure to a planar two-dimensional integrated structure by embedding T/R modules directly into the PWB layers. This dimensional change dramatically reduces the overall antenna height and weight while maintaining RF performance through careful design of the integrated circuit layouts and signal paths.
4Reliability
If back-drill and back-fill operations are performed on RF via holes, then RF performance is improved, but manufacturing cost increases and RF performance degrades due to tolerances and trapped air pockets
Solution Approach 1:
The patent extracts the problematic back-drill and back-fill operations from the RF via holes by designing the PWB structure so that RF vias terminate at the RF section boundary without requiring extension into non-RF sections. This eliminates the need for back-drilling in the RF section, avoiding trapped air pockets and manufacturing tolerances that degrade RF performance, while still allowing non-RF sections to undergo back-drilling if needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves a significant reduction in size, weight, and cost of phased array antennas while maintaining high RF performance, enabling wider adoption in military and commercial systems by simplifying manufacturing and improving thermal management.
Implementation Method 1
a thermally and electrically conductive ground plane disposed on a first one of the first and second surfaces of the PCB, the circulator thermally and electrically conductive ground plane in thermal and electrical contact with the circulator
Implementation Method 2
one or more thermal vias disposed through the PCB to provide thermal paths from the thermally and electrically conductive ground plane disposed on the first one of the first and second surfaces of the PCB to the second opposing surface of the PCB
Data Source
Figure 1
Figure 1A
Figure 1B
AI summary
A mixed-signal, multilayer printed wiring board fabricated in a single lamination step is described. The PWB includes one or more radio frequency (RF) interconnects between different circuit layers on different circuit boards which make up the PWB. The PWB includes a number of unit cells with radiating elements and an RF cage disposed around each unit cell to isolate the unit cell. A plurality of flip-chip circuits are disposed on an external surface of the PWB and a heat sink can be disposed over the flip chip components.