RF Circuit Fault Probability Determination via Sensitivity Correlation
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Solution Overview
Problem
Current methods for diagnosing faults in analog or radio frequency (RF) circuits are inefficient due to the need for extensive simulations and modeling, and lack practical methods for identifying faults that manifest as parametric variations.
Innovation Solution
A method that determines relevance values between input nodes and measurement nodes based on correlation, allowing for the calculation of fault probabilities without requiring fault models, detailed device knowledge, or simulations, by applying tests and measuring signal values to localize faulty circuit elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fault diagnosis is performed using traditional simulation methods with fault dictionaries, then fault detection capability is achieved, but the process requires extensive simulations and long computation time
Solution Approach 1:
The patent pre-calculates and stores sensitivity values for all possible faults during the design phase. These sensitivity values represent the relationship between fault locations and measurement points, allowing the system to quickly determine fault probabilities during production testing without performing extensive simulations at that stage.
Solution Approach 2:
The patent creates a mathematical model (fault probability distribution) that copies the essential characteristics of the physical fault behavior. Instead of simulating actual fault conditions repeatedly, the system uses the pre-computed sensitivity values to generate fault probability maps that replicate fault detection capabilities.
2Reliability
If traditional fault diagnosis methods are used for analog circuits, then some fault detection is possible, but the methods require detailed device knowledge and fault models
Solution Approach 1:
The patent enables the circuit to diagnose its own faults using built-in measurement points and the sensitivity value database. The system determines fault probabilities by comparing actual measurements with pre-computed sensitivity values, allowing the device to self-diagnose without requiring external experts to have detailed knowledge of the specific device architecture or fault models.
Solution Approach 2:
The patent transforms the fault diagnosis problem from requiring detailed device knowledge to using generic sensitivity parameters. By changing the approach from model-based diagnosis to parameter-based diagnosis using sensitivity values, the system can diagnose faults in analog circuits without needing detailed understanding of the specific circuit implementation.
3Reliability
If extensive simulations are performed to create fault dictionaries, then comprehensive fault coverage is achieved, but manufacturing productivity is reduced
Solution Approach 1:
The patent performs the computationally intensive simulation work in advance during the design phase, storing the results as sensitivity values. During manufacturing, the system only needs to perform simple comparisons between actual measurements and the pre-computed sensitivity values, dramatically reducing the time required per device while maintaining comprehensive fault coverage.
4Measurement precision
If fault diagnosis requires modeling of test conditions, then accurate fault identification is possible, but the process becomes more complex
Solution Approach 1:
The sensitivity values inherently capture the relationship between test conditions and fault manifestations. The system uses these pre-computed sensitivity values directly without requiring separate modeling of test conditions, as the sensitivity values already reflect how different test inputs affect measurements at various fault locations.
Data Source
AI summary
A method for determining relevance values representing a relevance of a combination of an input node of a first number of input nodes with a measurement node of a second number of measurement nodes for a detection of a fault on a chip applies a third number of tests at the first number of input nodes, measures for each test of the third plurality of tests a signal at each of the second number of measurement nodes to obtain for each measurement node of the second number of measurement nodes a third number of measurement values, and determines the relevance values, wherein each relevance value is calculated based on a correlation between the third number of test input choices defined for the input node of the respective combination and the third number of measurement values associated to the measurement node of the respective combination.


