RF Circuit Placement in Semiconductor Arrays

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Solution Overview

Problem

RF circuits in semiconductor devices occupy a large percentage of the surface area, limiting the reduction in size of integrated circuits due to their size and the need for dedicated areas, which hinders the scaling of other components like logic circuitry and memory.

Innovation Solution

RF circuits or portions thereof are integrated into active circuit or standard cell arrays, utilizing unused areas within the arrays, thereby reducing the need for dedicated space and allowing for more efficient use of the semiconductor device surface.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If RF circuits are placed in dedicated areas on the die, then RF circuit functionality is ensured, but the overall die area increases and scaling of other components is limited

Engineering Contradiction:
ImproveRF circuit functionalityVSAvoiddie area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges RF circuits with standard cell arrays by placing RF circuit elements (inductors, capacitors, transistors) within the same array structure as digital standard cells. This integration allows RF functionality to be achieved without separate dedicated areas, thereby reducing overall die area while maintaining RF circuit performance through proper element placement and configuration within the unified array.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The standard cell array is designed to serve multiple functions simultaneously: it houses both digital logic standard cells and RF circuit elements. The array structure becomes a universal platform that supports diverse circuit types, eliminating the need for separate dedicated RF regions and enabling more efficient space utilization on the die.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If RF circuits occupy large surface area, then RF performance is maintained, but the reduction in IC size is limited

Engineering Contradiction:
ImproveRF performanceVSAvoidIC scaling capability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies local quality by strategically placing RF circuit elements in specific locations within the standard cell array where they can achieve optimal RF performance with minimal area. By carefully selecting positions for inductors, capacitors, and transistors within the array and configuring their dimensions locally, the design maintains RF performance while minimizing the area occupied, thus enabling better IC scaling.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS7838959B2Radio frequency (RF) circuit placement in semiconductor devices
Publication Date: 2010.11.23 INFINEON TECHNOLOGIES AG
  • US7838959B2 patent drawing
  • US7838959B2 patent drawing
  • US7838959B2 patent drawing

AI summary

Semiconductor devices, methods of manufacturing thereof, and methods of arranging circuit components of an integrated circuit are disclosed. In one embodiment, a semiconductor device includes an array of a plurality of devices arranged in a plurality of rows. At least one radio frequency (RF) circuit or a portion thereof is disposed in at least one of the plurality of rows of the array of the plurality of devices.