RF DAC Split Bleeder Switching for Low Spurs and Noise

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Solution Overview

Problem

Existing RF DACs face challenges in reducing spurious tones and noise spectral density due to device mismatch and common mode switching glitches, which affect distortion performance and second-order harmonic distortion components.

Innovation Solution

A split bleeder source switching technique is implemented in the DAC current steering circuit, using two types of bleeder arms - non-switching and switching arms with shadow switching transistors - to minimize device mismatch and reduce spurious tones, while maintaining low noise spectral density and improving distortion performance without additional current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If shadow switching transistors are used to reduce HD2 leak components, then distortion performance is improved, but spurious tones appear at Fs/2 and (Fs/2-Fin) frequencies due to mismatch between switching devices

Engineering Contradiction:
Improvedistortion performanceVSAvoidspurious tones
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The bleeder current source is segmented into two separate sources: a first bleeder current source connected to the first output and a second bleeder current source connected to the second output. This segmentation allows independent optimization of each path, reducing the impact of mismatch between switching devices while maintaining the shadow switching benefit for HD2 reduction.

Inventive Principle:
Principle #1Segmentation

2Object-generated harmful factors

If unary cell selection is randomized to reduce spurious tones, then spurious performance is improved, but noise spectral density increases

Engineering Contradiction:
Improvespurious tonesVSAvoidnoise spectral density
Core Design Contradiction:
Object-generated harmful factorsVSObject-affected harmful factors

Solution Approach 1:

The DAC output is segmented into two separate outputs with independent bleeder current sources. This allows the circuit to achieve low spurious performance through balanced shadow switching without requiring randomization of unary cell selection, thereby avoiding the increase in noise spectral density that would result from such randomization.

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If common mode switching glitches are reduced through shadow switching, then second order harmonic distortion is improved, but device mismatch effects become more prominent

Engineering Contradiction:
Improvesecond order harmonic distortionVSAvoiddevice mismatch effects
Core Design Contradiction:
Manufacturing precisionVSMeasurement precision

Solution Approach 1:

The circuit segments the bleeder current path into two independent sources, allowing each to be optimized for its respective output. This reduces the common mode switching glitches that cause second order harmonic distortion while minimizing the impact of device mismatch by providing independent current paths that can be better matched individually.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each bleeder current source is independently designed and connected to its respective output, allowing local optimization of the current characteristics for each output path. This local quality approach ensures that each path has optimal matching characteristics, reducing the overall mismatch effects while maintaining effective shadow switching for HD2 reduction.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11265001B1RF DAC with low noise spectral density and mismatch spurs
Publication Date: 2022.03.01 XILINX INC
  • US11265001B1 patent drawing
  • US11265001B1 patent drawing
  • US11265001B1 patent drawing

AI summary

A DAC current steering circuit includes first and second transistors, respectively coupled to first and second outputs via first and second nodes at their drains, and source coupled to each other and to ground. A gate of the first transistor is coupled to a data input (D), and a gate of the second transistor coupled to a complement of the data input (DB). The circuit further includes first and second bleeder transistors, whose drains are respectively coupled to the first and second nodes, and whose sources are coupled together at a third node, the third node coupled to ground, and first and second bleeder switching transistors, whose drains and sources are each coupled to the third node, a gate of the first bleeder switching transistor coupled to a switching input (S) and a gate of the second bleeder switching transistor coupled to a complement of the switching input (SB).