RF Detector Full-Wave Rectification for Low-Power NFC Sensing
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Solution Overview
Problem
Existing RF circuit detectors for NFC communication in mobile devices consume high DC power, especially when monitoring low-amplitude input signals, which is inefficient for non-contact electronic payment operations.
Innovation Solution
A detector design with first and second input terminals, transistors, and a load element that utilizes complementary input signals and full-wave rectification to minimize DC power consumption by adjusting conduction levels based on input signal polarity, along with preventive elements for countercurrent and electrostatic protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional RF detector uses biasing resistors connected between drain and gate of MOS transistors to maintain transistor operation, then the detector can continuously monitor RF signals, but DC power consumption increases significantly
Solution Approach 1:
The detector uses periodic switching of the MOS transistor gate voltage between ON and OFF states synchronized with the RF signal cycle. During each RF cycle, the transistor conducts only during half-cycles when the signal amplitude exceeds the threshold, rather than maintaining continuous conduction. This periodic action allows signal detection while dramatically reducing average DC power consumption by eliminating constant bias current flow through the transistor.
Solution Approach 2:
The invention dynamically changes the operating state of the MOS transistor by modulating the gate voltage parameter. The gate voltage is switched between a first voltage level (turning transistor ON) and a second voltage level (turning transistor OFF) based on the RF signal characteristics. This parameter change enables the transistor to operate in a pulsed manner rather than continuously, resolving the contradiction between detection reliability and power consumption.
2Stability of the object's composition
If biasing resistors are used to establish gate voltage for MOS transistors in the detector, then the detector maintains operational stability, but power consumption increases
Solution Approach 1:
Instead of using continuous biasing resistors to maintain stable operation, the invention employs periodic switching of the gate voltage that is synchronized with the RF signal. The transistor is turned ON during signal peaks and OFF during troughs, providing stable detection operation only when needed. This periodic action maintains operational stability during active detection phases while eliminating power consumption during inactive phases.
Solution Approach 2:
The invention extracts and removes the continuous biasing resistor network from the detector circuit. By eliminating these resistors that continuously draw power, the design achieves stable operation through periodic gate voltage switching instead. The biasing function is replaced by timed voltage application, removing the harmful continuous power consumption while preserving detection stability.
3Reliability
If the detector continuously monitors low-amplitude NFC carrier signals, then communication reliability is maintained, but DC power consumption becomes excessive for mobile device battery operation
Solution Approach 1:
The detector implements periodic monitoring of NFC carrier signals by switching the MOS transistor gate voltage in synchronization with the RF signal cycles. The transistor conducts during half-cycles when the carrier signal amplitude is sufficient for detection and remains OFF during other periods. This periodic monitoring maintains NFC communication reliability by detecting signals when present while dramatically reducing average DC power consumption suitable for mobile battery operation.
Solution Approach 2:
The invention introduces dynamic switching behavior to the detector circuit, making the transistor conduction state variable rather than static. The gate voltage is dynamically adjusted between ON and OFF states based on the instantaneous RF signal conditions. This dynamic operation allows the detector to adapt its power consumption to signal presence, maintaining reliability when needed while minimizing power usage during idle periods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces DC power consumption during low-amplitude signal monitoring, enhancing the efficiency of NFC communication and non-contact electronic payment operations by minimizing power usage when detecting carrier signals.
Implementation Method 1
A detection voltage VIN1 resulting from full-wave rectification arises from a circuit node to which the output electrodes of the first and second transistors and the load element are connected
Implementation Method 2
The detector monitors a signal level of the receive carrier signal from the non-contact reader/writer apparatus, which has been received through the antenna
Data Source
AI summary
The detector is reduced in DC power consumption when an input signal is at a low amplitude level. The detector includes first and second input terminals, first and second transistors, and a load element. The first and second input terminals are supplied with complementary input signals reverse to each other in phase. The first input terminal is connected to the first input electrode of the first transistor and the second input electrode of the second transistor. The second input terminal is connected to the second input electrode of the first transistor and the first input electrode of the second transistor. The load element is connected between output electrodes of the transistors and an operating voltage point. A detection voltage resulting from full-wave rectification arises from a circuit node. In the condition where a signal input to the input terminals is at a low amplitude level, the transistors are both in OFF state. Thus, DC power consumption is reduced.