RF MEMS Capacitive Device Current Splitting for High Q-Factor
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Solution Overview
Problem
RF MEMS devices built on low resistivity silicon wafers suffer from high substrate losses due to the underlying substrate, which increases parasitic capacitance and affects the Q-factor when metallic shields are used to isolate the RF circuits, making it challenging to minimize capacitance without reducing the Q-factor.
Innovation Solution
The implementation of current splitting and routing techniques to distribute current uniformly among the device's layers, allowing for narrow interconnects and feeds while maintaining a high Q-factor, and optimizing both Q and minimum capacitance (Cmin) by defining multiple current paths within the metal layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a metallic shield is used to isolate RF circuits from the lossy substrate, then substrate losses are reduced, but parasitic capacitance increases
Solution Approach 1:
The metal layer is divided into multiple electrically isolated segments (first portion and second portion) that are independently connected to the terminus. This segmentation allows current to flow through multiple separate paths, reducing the parasitic capacitance effect while maintaining shielding functionality.
Solution Approach 2:
The patent transitions from a single-planar metal shield to a multi-dimensional structure with multiple metal portions stacked or distributed across different layers, each independently connected to the terminus. This dimensional approach distributes the capacitive effect across multiple smaller elements.
2Object-generated harmful factors
If interconnect and feed metallization is minimized to reduce parasitic capacitance, then parasitic capacitance decreases, but Q-factor deteriorates
Solution Approach 1:
The current path is segmented into multiple portions (first portion, second portion) that are independently connected to the terminus. This segmentation allows the total current to be distributed across multiple parallel paths, effectively reducing the parasitic capacitance while maintaining adequate current carrying capability for high Q-factor.
Solution Approach 2:
Multiple metal portions are combined in parallel to provide multiple current paths between the metal layer and the terminus. This merging of parallel paths reduces the effective parasitic capacitance while maintaining the current carrying capacity needed for high Q-factor performance.
3Quantity of substance
If minimum capacitance (Cmin) is reduced to improve device performance, then capacitance ratio increases, but Q-factor may be adversely affected
Solution Approach 1:
The metal layer is segmented into multiple electrically isolated portions that are independently connected to the terminus. This segmentation reduces the minimum capacitance by distributing the capacitive effect across multiple smaller elements, while the independent connections maintain adequate current paths for high Q-factor.
Data Source
AI summary
The present subject matter relates to the use of current splitting and routing techniques to distribute current uniformly among the various layers of a device to achieve a high Q-factor. Such current splitting can allow the use of relatively narrow interconnects and feeds while maintaining a high Q. Specifically, for example a micro-electromechanical systems (MEMS) device can comprise a metal layer comprising a first portion and a second portion that is electrically separated from the first portion. A first terminus can be independently connected to each of the first portion and the second portion of the metal layer, wherein the first portion defines a first path between the metal layer and the first terminus, and the second portion defines a second path between the metal layer and the first terminus.