RF Pulse Width Modulation Using PLL Phase Selection
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Solution Overview
Problem
Traditional RF Pulse Width Modulation (RFPWM) systems face limitations in dynamic range and resolution due to pulse swallowing and sensitivity to process, voltage, and temperature variations, making them unsuitable for high peak-to-average power ratio communication standards like WLAN.
Innovation Solution
A system utilizing a delta sigma modulator and phase-locked loop with multiplexers and an AND gate to generate RFPWM signals, allowing for enhanced dynamic range and reduced sensitivity through correlated delta sigma interpolation, enabling better signal fidelity and reduced power and area consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If traditional RFPWM systems use ANDing of two phase-shifted RF waveforms, then the system achieves simple circuit structure, but the dynamic range is limited due to pulse width distortion and pulse swallowing
Solution Approach 1:
The patent changes the fundamental operating parameters of RFPWM by using a single RF waveform with variable duty cycle instead of ANDing two phase-shifted waveforms. This parameter change eliminates pulse swallowing and extends dynamic range from less than 10 dB to over 100 dB while maintaining simple circuit structure
Solution Approach 2:
The patent inverts the traditional RFPWM approach by switching from dual-waveform ANDing to single-waveform duty cycle modulation. This inversion fundamentally resolves the pulse swallowing issue that limited dynamic range in conventional systems
2Speed
If the desired pulse width is less than the rise time of the circuit, then the circuit output cannot transition to full logical high, but increasing the pulse width avoids pulse swallowing
Solution Approach 1:
The patent changes the modulation parameter from pulse width (which is constrained by rise time) to duty cycle of a single waveform. This allows precise control of amplitude without being limited by circuit rise time, as the duty cycle can be varied continuously without requiring full logic transitions
3Measurement precision
If phase interpolator units are used to increase amplitude quantizations, then resolution is improved, but the circuit becomes highly sensitive to PVT and consumes significant area and power
Solution Approach 1:
The patent changes from phase-based amplitude control (requiring many interpolators) to duty cycle-based control. A single phase-shifted waveform with variable duty cycle provides continuous amplitude control without requiring hundreds or thousands of phase interpolator units, dramatically reducing PVT sensitivity, area, and power consumption
Solution Approach 2:
The patent extracts and eliminates the complex phase interpolator network from the RFPWM system. By using a single waveform with variable duty cycle instead of multiple phase-shifted waveforms, the system removes the source of PVT sensitivity and area/power consumption issues
4Reliability
If carrier switching is used to extend dynamic range, then low amplitudes are achieved, but a very high number of devices must be matched to one another
Solution Approach 1:
The patent changes from carrier switching (which requires matching many devices at different frequencies) to duty cycle modulation of a single carrier. This provides continuous amplitude control from 0 to maximum without requiring matching of multiple carriers or complex switching networks
Data Source
AI summary
A system for generating an RFPWM signal comprises a delta sigma modulator having a plurality of outputs, a phase-locked loop comprising a plurality of phase quantization outputs, at least one multiplexer having a plurality of signal inputs, a plurality of selector inputs, and at least one output, the signal inputs communicatively connected to the phase quantization outputs of the phase-locked loop and the selector inputs electrically connected to the outputs of the delta sigma modulator, and a driver having an input communicatively connected to the output of the multiplexer and an output generating an RFPWM signal. A method of generating an RFPWM signal is also described.