RF Switch Discharge Circuit for Lower Intermodulation Distortion
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Solution Overview
Problem
Radio-frequency (RF) switches face challenges in achieving improved intermodulation distortion (IMD) performance due to non-linearity issues, which affect the integrity of RF signals and susceptibility to interference, especially in multi-band and multi-mode wireless communication systems.
Innovation Solution
Incorporating a coupling circuit between the body and gate of field-effect transistors (FETs) in RF switches, which includes a capacitor in series with a resistor, to facilitate the discharge of interface charge and enhance IMD performance, while also using silicon-on-insulator (SOI) technology to reduce parasitic capacitance and improve power handling capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a coupling circuit with capacitor and resistor is added to discharge interface charge from the FET body, then intermodulation distortion performance is improved, but device complexity increases
Solution Approach 1:
A coupling circuit comprising a capacitor and resistor is introduced as an intermediary element between the FET body and gate. This coupling circuit mediates the discharge of interface charge from the FET body, thereby improving intermodulation distortion performance without requiring fundamental redesign of the FET structure itself
Solution Approach 2:
The invention modifies the electrical parameters of the FET by adding a coupling circuit that changes the charge distribution characteristics. Specifically, the capacitor and resistor values are selected to optimize the discharge of interface charge, thereby changing the operational parameters to achieve improved IMD performance
2Power
If silicon-on-insulator (SOI) technology is used to reduce parasitic capacitance, then power handling capability is improved, but manufacturing complexity increases
Solution Approach 1:
Silicon-on-insulator (SOI) technology employs a composite structure consisting of a silicon layer deposited on an insulator layer (typically silicon dioxide). This composite material approach reduces parasitic capacitance between the FET and substrate, thereby improving power handling capability while managing the manufacturing complexity through established semiconductor fabrication processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces intermodulation distortion, enhances linearity, and improves power handling capabilities, leading to better RF signal integrity and reduced interference susceptibility in wireless communication systems, particularly in multi-band and multi-mode environments.
Implementation Method 1
The coupling circuit can include a capacitor in series with a resistor
Implementation Method 2
The coupling circuit can include a capacitor in series with a resistor
Implementation Method 3
using silicon-on-insulator (SOI) technology to reduce parasitic capacitance
Implementation Method 4
The die can be a silicon-on-insulator (SOI) die
Data Source
AI summary
Radio-frequency (RF) switch circuits are disclosed providing improved switching performance. An RF switch system includes at least one field-effect transistor (FET) disposed between a first node and a second node, each having a respective source, drain, gate, and body. The system includes a coupling circuit including a first path and a second path, the first path being between the respective source or the respective drain and the respective gate of the at least one FET, the second path being between the respective source or the respective drain and the respective body of the at least one FET. The coupling circuit may be configured to allow discharge of interface charge from either or both of the coupled gate and body.


