Low-k RF Switch Sidewall Spacer for Lower Parasitic Capacitance
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Solution Overview
Problem
Modern RF switch devices face performance degradation due to high parasitic capacitance from silicon nitride sidewall spacers, leading to leakage and insertion losses, and the etch back process for these spacers is difficult to control, potentially causing substrate damage.
Innovation Solution
Employing a sidewall spacer with a low dielectric constant material such as silicon oxycarbonitride (SiOCN) or silicon oxycarbide (SiOC) reduces parasitic capacitance and allows for better control of the etch back process using a 1% hydrogen fluoride solution, minimizing leakage and substrate damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silicon nitride sidewall spacers are used, then structural support is provided, but parasitic capacitance increases leading to leakage and insertion losses
Solution Approach 1:
The patent changes the dielectric constant parameter of the sidewall spacer material from high (silicon nitride, k≈7-9) to low (silicon oxycarbonitride, k≈4-5), directly reducing parasitic capacitance between gate and drain/source regions while maintaining the spacer's structural function
Solution Approach 2:
The patent uses composite material composition (silicon oxycarbonitride containing Si, O, C, and N elements) that combines the structural properties needed for sidewall support with low dielectric constant properties to minimize parasitic capacitance effects
2Manufacturing precision
If etch back process is used to form sidewall spacers, then precise positioning is achieved, but substrate damage may occur
Solution Approach 1:
The patent changes the material composition parameter to silicon oxycarbonitride, which has different etch characteristics compared to silicon nitride, enabling more controlled etch back rates that prevent substrate damage while achieving precise spacer positioning
Solution Approach 2:
The patent introduces an intermediary material layer (silicon oxycarbonitride) between the gate structure and the substrate that can be selectively etched back without damaging the underlying substrate, acting as a buffer during the etch back process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of low dielectric constant sidewall spacers in RF switch devices enhances electrical isolation and reduces insertion losses, improving overall switch performance while preventing substrate damage during fabrication.
Implementation Method 1
a sidewall spacer with a low dielectric constant material such as silicon oxycarbonitride (SiOCN) or silicon oxycarbide (SiOC) reduces parasitic capacitance
Implementation Method 2
allows for better control of the etch back process using a 1% hydrogen fluoride solution
Data Source
AI summary
Various embodiments of the present disclosure are directed towards an integrated circuit (IC). The IC includes a pair of source/drain regions in a substrate. A gate dielectric layer is on the substrate and laterally between the source/drain regions. A gate electrode overlies the gate dielectric layer. A sidewall liner is disposed along sidewalls of the gate electrode and along an upper surface of the substrate. A sidewall spacer overlies the substrate and is on sidewalls and an upper surface of the sidewall liner. The sidewall spacer has a pair of segments respectively on opposite sides of the gate electrode. The sidewall spacer consists essentially of silicon oxycarbonitride. A dielectric constant of the sidewall spacer is greater than that of the sidewall liner.