Ridge HEMT Structure for Higher On-Current Without Etch Damage
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Solution Overview
Problem
Existing high electron mobility transistors (HEMTs) fabricated from GaN-based materials face challenges in achieving high on-current while maintaining device stability due to the formation of damaged layers during the etching process for ridge structures, which can affect the device's performance and increase costs associated with larger gate electrode areas.
Innovation Solution
A method involving the formation of a buffer layer, patterned mask to create ridges and trenches, removal of the damaged layer, deposition of a barrier layer, and a p-type semiconductor layer, followed by the formation of source and drain electrodes, which enhances the effective gate width and on-current without compromising device stability through additional cleaning processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If ridge structures are formed during the etching process to increase effective gate width, then on-current is improved, but damaged layers are formed on the ridges which compromise device stability
Solution Approach 1:
The device structure is segmented into ridges and trenches, with the active channel confined to the ridge regions. This segmentation increases the effective gate width while allowing selective processing of damaged areas. The trench regions serve to isolate and contain damaged layers, preventing them from affecting overall device stability.
Solution Approach 2:
The damaged layer formed on the ridge surfaces during etching is selectively removed through selective etching processes. This extraction of harmful damaged material while preserving the ridge structure enables maintaining both high on-current (from increased effective gate width) and device stability (by removing instability-causing damaged layers).
2Productivity
If larger gate electrode area is used to increase on-current, then device performance is improved, but manufacturing cost increases
Solution Approach 1:
Instead of increasing gate electrode area in the planar dimension, the invention utilizes the vertical dimension by forming three-dimensional ridge structures. This increases the effective gate width (and thus on-current) without requiring a larger lateral footprint, thereby avoiding increased manufacturing costs associated with larger device areas.
3Reliability
If additional cleaning processes are implemented to remove damaged layers, then device stability is improved, but manufacturing complexity increases
Solution Approach 1:
The cleaning process is applied locally and selectively to specific regions (ridges or trenches) rather than uniformly across the entire device structure. This localized selective etching approach removes damaged layers where they occur while minimizing unnecessary processing steps, thereby improving device stability without proportionally increasing manufacturing complexity.
Data Source
AI summary
A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a patterned mask on the buffer layer; using the patterned mask to remove the buffer layer for forming ridges and a damaged layer on the ridges; removing the damaged layer; forming a barrier layer on the ridges; and forming a p-type semiconductor layer on the barrier layer.