Rigid-Flex Sub-Assembly for 3D Semiconductor Interconnects

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Solution Overview

Problem

Existing semiconductor device packages face challenges in accommodating sophisticated features that impact reliability, performance, and cost, particularly in configurations involving flexible carriers and rigid layers.

Innovation Solution

A semiconductor device with a rigid-flex sub-assembly is formed by affixing a semiconductor die to a rigid-flex sub-assembly with a rigid portion and a flex portion, which is then encapsulated and connected to a package substrate, allowing for 3D interconnects and exposure of connection pads for additional components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a flexible carrier with rigid layer is used to support semiconductor chips, then the structural support and alignment are improved, but the flexibility and adaptability are reduced

Engineering Contradiction:
Improvestructural supportVSAvoidflexibility
Core Design Contradiction:
StrengthVSAdaptability or versatility

Solution Approach 1:

The sub-assembly is divided into two distinct segments: a flexible carrier portion and a rigid layer portion. The flexible carrier provides adaptability and conformability, while the rigid layer provides structural support and dimensional stability. This segmentation allows each portion to fulfill its specific function without compromising the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The sub-assembly combines materials with different mechanical properties - a flexible polymer-based carrier material and a rigid ceramic or metal layer. This composite structure integrates the advantages of both materials: flexibility and conformability from the carrier, and strength and stability from the rigid layer, resolving the contradiction between these opposing requirements.

Inventive Principle:
Principle #40Composite materials

2Productivity

If multiple chips are mounted on a single substrate, then the integration density is improved, but the heat dissipation and signal interference are worsened

Engineering Contradiction:
Improveintegration densityVSAvoidheat dissipation
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The rigid layer is positioned in a third dimension above the chips rather than in the same plane, creating vertical separation. This dimensional arrangement allows heat to dissipate more effectively through the rigid layer while maintaining electrical connections, and reduces signal interference by physically separating the interconnect layer from the chip signal traces.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentEP4456126B1Semiconductor device with rigid-flex sub-assembly and method therefor
Publication Date: 2025.12.10 NXP USA INC
  • EP4456126B1 patent drawingFigure 1
  • EP4456126B1 patent drawingFigure 2
  • EP4456126B1 patent drawingFigure 3

AI summary

A method of forming a semiconductor device is provided. The method includes placing a semiconductor die on a carrier substrate and affixing a rigid-flex sub-assembly on the semiconductor die. The rigid-flex sub-assembly includes a rigid portion and a flex portion having a conductive trace. A distal region of the flex portion is bent such that the bent distal region is not coplanar with the rigid portion. An encapsulant encapsulates at least a portion of the semiconductor die and the rigid-flex sub-assembly.