Ring Oscillator Checker Circuits for Early Silicon Error Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current post-silicon testing methods for integrated circuits suffer from significant latency and inadequacy in detecting silicon errors, particularly those arising from interactions between different design components, leading to costly and inefficient bug detection.
Innovation Solution
Implementing checker logic circuitry with ring oscillator circuits that mirror functional logic paths to monitor and detect pre-alarm conditions, allowing for early error detection by comparing frequency values against reference thresholds, triggering pre-alarm responses before actual failures occur.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If current post-silicon testing methods are used, then bug detection is achieved, but significant latency occurs with bug detection taking millions of clock cycles
Solution Approach 1:
The patent implements preliminary action by using ring oscillator circuits to continuously monitor functional logic paths before actual failures occur. The checker logic circuitry proactively detects pre-alarm conditions by comparing frequency values against reference thresholds, enabling early error detection without waiting for failures to manifest, thus reducing detection latency from millions of clock cycles to near-real-time monitoring.
2Reliability
If current post-silicon testing methods are used, then some errors are detected, but inadequacy occurs in detecting silicon errors from interactions between different design components
Solution Approach 1:
The patent applies universality by designing ring oscillator circuits that can mirror multiple functional logic paths and detect various types of errors including those from interactions between different design components. The checker logic circuitry universally monitors frequency values across different paths and compares them against reference thresholds, providing comprehensive error detection coverage for diverse error scenarios.
3Reliability
If current mechanisms trigger alarm after failure detection, then failure response is provided, but early detection enabling movement to safe state within FHTI is not achieved
Solution Approach 1:
The patent implements preliminary action by detecting pre-alarm conditions before actual failures occur. The ring oscillator circuits continuously monitor functional logic paths and the checker logic circuitry compares frequency values against reference thresholds to identify deviations indicating potential failures. This enables the system to move to a safe state within the Fault Handling Time Interval (FHTI) by triggering alarms proactively before failures manifest, rather than reacting after failures occur.
Data Source
AI summary
An integrated circuit includes a plurality of electronic devices providing a plurality of functional logic paths and checker logic circuitry. The checker logic circuitry includes a plurality of ring oscillator circuits respectively corresponding to the plurality of functional logic paths, wherein each ring oscillator circuit comprises circuitry in a ring oscillator configuration mirroring its corresponding functional logic path, clock counter circuitry configured to determine frequency values of each of the plurality of ring oscillator circuits; and alarm trigger circuitry. The alarm trigger circuitry is configured to determine whether the determined frequency values cross one or more of a plurality of reference frequency values and trigger one or alarm responses in response to determining one or more of the reference frequency values has been crossed.