Competing-Path Ring Oscillator for Direct Latch Timing Window Measurement

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current methods for measuring latch hold-times in computer systems rely on simulations, which often result in inaccurate predictions and the addition of guard-band margins, leading to reduced performance and increased costs due to differences between simulation estimates and actual performance.

Innovation Solution

A method and apparatus for direct measurement of latch timing window parameters using a competing path ring oscillator circuit, where a start-up pulse is delayed through a ring oscillator circuit to determine the oscillating state, allowing for the direct measurement of setup and hold times by configuring delay blocks with varying delay times and combining outputs for multiplexed signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If simulation methods are used to estimate latch hold-times, then measurement complexity is reduced, but measurement precision deteriorates due to differences between simulation predictions and actual performance

Engineering Contradiction:
Improvemeasurement complexityVSAvoidlatch hold-time measurement precision
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The ring oscillator circuit automatically measures its own timing parameters through self-oscillation. The circuit uses the latch circuit under test as an integral component, and the oscillation characteristics directly reveal the timing window parameters without requiring external measurement equipment or complex test setups.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent uses electrical oscillation in the ring oscillator circuit to measure timing parameters. By analyzing the oscillation frequency and behavior of the circuit, the latch timing window parameters can be directly determined through the relationship between oscillation period and delay elements.

Inventive Principle:
Principle #18Mechanical vibration

2Reliability

If guard-band margins are added to simulation estimates, then reliability is improved, but productivity deteriorates due to reduced performance

Engineering Contradiction:
Improvelatch operation reliabilityVSAvoidlatch circuit performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent replaces simulation-based estimation with direct hardware measurement using ring oscillator circuits. This substitution provides accurate timing parameter data that eliminates the need for conservative guard-band margins, allowing the latch circuits to operate at their true performance limits without sacrificing reliability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Measurement precision

If direct hardware measurement methods are used for latch timing parameters, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvelatch timing parameter measurement precisionVSAvoidmeasurement circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The ring oscillator circuit serves multiple functions: it generates clock signals, provides delay elements, and simultaneously measures the timing parameters of the latch circuit. This multi-functionality reduces the need for separate dedicated measurement circuits, thereby limiting the increase in overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20240162895A1Competing path ring-oscillator for direct measurement of a latch timing window parameters
Publication Date: 2024.05.16 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20240162895A1 patent drawing
  • US20240162895A1 patent drawing
  • US20240162895A1 patent drawing

AI summary

Direct measurement of a latch timing window includes, for each of a plurality of predetermined delay times: providing a first signal to a data input of a first latch of a ring oscillator circuit via a delay block configured to delay the first signal by the predetermined delay time; providing the first signal to a first logic clock buffer (LCB); generating a clock signal by the first LCB responsive to receiving the first signal; providing the clock signal to a clock input of the first latch; and determining from an output of the ring oscillator circuit that the ring oscillator circuit is in either an oscillating state or a non-oscillating state. At least one timing window parameter for the first latch is determined based on one or more of the plurality of delay times that are associated with an oscillating state of the ring oscillator circuit.