RNVM Configurable Logic Block for Non-Volatile LUT Storage
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Solution Overview
Problem
Conventional configurable logic blocks (CLBs) face challenges in integrating system-on-a-chip (SoC) due to varying memory types, leading to increased complexity and costs, with SRAM-based CLBs experiencing power consumption issues and loss of programming content during system power interruptions.
Innovation Solution
A configurable logic block utilizing two resistive non-volatile memory (RNVM) elements connected in series to store logic values, allowing for high-density, low-power operation with information preservation, and reducing the need for additional fabrication processes or masks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If SRAM is used to store LUT content in CLB, then the CLB can be programmed with different logic functions, but the programming content is lost when system power is interrupted and requires rewriting
Solution Approach 1:
The patent changes the memory type parameter from volatile SRAM to non-volatile memory (such as phase-change memory or resistive memory), fundamentally altering the information retention characteristic while maintaining the configurable logic function capability
Solution Approach 2:
The patent performs preliminary programming of the LUT content into non-volatile memory before system shutdown, ensuring that the programming content is preserved and does not need to be rewritten after power interruption
2Quantity of substance
If SRAM is used in CLB, then the CLB can store LUT content, but the static power consumption and dynamic power consumption are higher
Solution Approach 1:
The patent changes the memory technology parameter from SRAM to non-volatile memory, which has fundamentally different power consumption characteristics, eliminating static power consumption and reducing dynamic power consumption
Solution Approach 2:
The patent extracts the memory function from the volatile SRAM component and implements it separately using non-volatile memory technology, allowing the CLB to maintain functionality while reducing power consumption
3Adaptability or versatility
If different memory types are used for CLB, then the CLB can have different functions, but the integration of system-on-a-chip becomes difficult and costs increase
Solution Approach 1:
The patent uses a universal non-volatile memory structure that can perform multiple CLB functions (logic operations, storage, etc.), eliminating the need for different memory types for different functions and simplifying the fabrication process
Solution Approach 2:
The patent merges the memory function and logic function into a unified non-volatile memory-based CLB structure, reducing the number of separate components and simplifying the overall chip architecture for easier integration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a low-power, non-volatile configurable logic block with reduced fabrication costs and preserved information, addressing the integration challenges and power consumption issues of conventional CLBs.
Implementation Method 1
two resistive non-volatile memory (RNVM) elements connected in series to store logic values
Implementation Method 2
determining an output logic value of the configurable logic block according to a logic value of the output terminal of the selected one of the memory units
Data Source
AI summary
A configurable logic block (CLB) and an operation method of the CLB are provided. The CLB includes memory units and a selecting circuit. The memory unit includes a first resistive non-volatile memory (RNVM) element and a second RNVM element. Top electrodes (TEs) of the first and second RNVM elements are coupled to an output terminal of the memory unit. Bottom electrodes (BEs) of the first and second RNVM elements are respectively coupled to a first bias terminal and a second bias terminal of the memory unit. The selecting circuit selects one of the memory units according to an input logic value and determines an output logic value of the CLB according to an output logic value of the selected memory unit.