ROIC Substrate Replacement for Strain-Free Microcircuit Interconnects

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Solution Overview

Problem

Current electro-optical sensors face challenges in maintaining interconnect integrity between detectors and read-out integrated circuits (ROICs) due to differential thermal expansion, especially with increasing thermal cycle requirements and larger arrays operating in varying temperature environments.

Innovation Solution

A method is provided to eliminate interconnect strains by attaching a new ROIC substrate with a matching coefficient of thermal expansion (CTE) to the existing ROIC layers, allowing for hybridization of detector layers via interconnects, which can be deposited before or after bonding, ensuring minimal thermal expansion and stress between the detector and ROIC substrates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a traditional ROIC substrate is used with the detector, then the initial assembly is simple, but differential thermal expansion causes interconnect strain during thermal cycles

Engineering Contradiction:
Improveinterconnect integrityVSAvoidsubstrate assembly process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent removes the traditional ROIC substrate from the assembly and replaces it with a detector substrate that has matching CTE properties. This extraction of the problematic component (mismatched substrate) eliminates the source of differential thermal expansion while maintaining the functional integrity of the detector-ROIC assembly.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the CTE parameter of the substrate by replacing the traditional ROIC substrate with a detector substrate made of material having a CTE that matches the detector. This parameter matching eliminates thermal expansion mismatch and prevents interconnect strain during thermal cycling.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the number of thermal cycles is increased to meet operational demands, then operational capability is improved, but interconnect integrity deteriorates due to accumulated thermal stress

Engineering Contradiction:
Improvethermal cycle capacityVSAvoidinterconnect integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent converts the harmful effect of thermal cycling into a beneficial outcome by matching the CTE of the detector substrate with the ROIC substrate. This eliminates differential thermal expansion, allowing the system to withstand extensive thermal cycling (10,000+ cycles) without degrading interconnect integrity, thus transforming thermal stress from a harmful factor into a manageable parameter.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Adaptability or versatility

If array size is increased or operating temperature is reduced, then performance requirements are met, but thermal cycle reliability becomes more difficult to maintain

Engineering Contradiction:
Improveoperational flexibilityVSAvoidthermal cycle reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent changes the material composition and CTE parameters of the substrate to match the detector's thermal properties. This parameter matching allows the system to maintain thermal cycle reliability across varying operating conditions, including reduced temperatures and larger array configurations, by eliminating the primary source of thermal stress.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances thermal cycle reliability, potentially allowing for unlimited cooldown cycles, reduces stress on the detector and ROIC, and minimizes image artifacts caused by bowing, thereby improving the hybrid reliability of interconnects and reducing detector stress.

Implementation Method 1

the new ROIC substrate having a coefficient of thermal expansion (CTE) that matches a CTE of the detector substrate

Methodology Applied
Scientific EffectCoefficient of thermal expansion (CTE) matching: Thermal Expansion

Data Source

PatentUS11776981B2Eliminating interconnect strains in microcircuits
Publication Date: 2023.10.03 RAYTHEON CO
  • US11776981B2 patent drawing
  • US11776981B2 patent drawing
  • US11776981B2 patent drawing

AI summary

A method of eliminating interconnect strains in a stack-up is provided. The method includes providing a detector portion including a detector substrate and detector layers, providing a read-out integrated circuit (ROIC) stack-up including ROIC layers and an initial ROIC substrate, removing the initial ROIC substrate from the ROIC layers, attaching a new ROIC substrate to a first surface of the ROIC layers, the new ROIC substrate having a coefficient of thermal expansion (CTE) that matches a CTE of the detector substrate and hybridizing the detector layers to a second surface of the ROIC layers by way of interconnects.