ROM Computing Unit for Analog Matrix Operations
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Solution Overview
Problem
Current machine learning and neural network systems face challenges with large memory requirements and computational power due to the need for extensive data transfer of weights in digital hardware implementations, leading to inefficiencies in time and energy consumption.
Innovation Solution
The implementation of a hybrid memory computing unit that combines read-only memory (ROM) and random access memory (RAM) with passive or active electrical elements to adjust weights within a neural network, allowing for in-memory computation and reducing data transfer by performing matrix operations directly within the memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If digital hardware implementation with separate memory and compute units is used, then neural network models can be flexibly updated, but data transfer between memory and compute units consumes significant time and energy
Solution Approach 1:
The patent merges memory and compute units into a unified in-memory computing architecture where weights are stored in memory cells and MAC operations are performed directly within the memory array, eliminating the need for data transfer between separate memory and compute units
Solution Approach 2:
The memory array serves multiple functions: storing weights, performing analog multiplication through conductance modulation, and accumulating results through current summation, allowing the same hardware structure to handle both storage and computation tasks
2Productivity
If analog computation is performed inside high-density memory, then data transfer is reduced and MAC operations can be performed simultaneously, but the complexity of adjusting and reprogramming weights increases
Solution Approach 1:
The patent employs dynamically adjustable conductance elements (such as memristors or transistor-based structures) that allow weights to be reconfigured by applying voltage pulses during fabrication or operation, enabling the system to adapt to different neural network models while maintaining analog computation capabilities
Solution Approach 2:
The patent changes the physical parameter (conductance) of memory elements to represent weight values, allowing continuous or discrete weight adjustment through controlled modulation of electrical properties rather than changing the structural configuration
3Measurement precision
If larger neural networks with more layers and weights are deployed, then task difficulty and accuracy improve, but the required memory capacity and computational power increase significantly
Solution Approach 1:
The patent transitions from digital to analog domain for weight storage and computation, utilizing the continuous conductance parameter of memory elements to represent weight values, which allows for higher precision and larger network sizes within the same physical footprint
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient and energy-effective neural network operations by storing weights in memory where computation occurs, allowing simultaneous MAC operations for multiple inputs and weights, thereby reducing the need for sequential data transfer and enhancing performance.
Implementation Method 1
one or more passive or active electrical elements located in the unit element, wherein the passive or active electrical elements are configured to adjust the weight associated with the compute unit
Data Source
AI summary
A read-only memory (ROM) computing unit utilized in matrix operations of a neural network comprising a unit element including one or more connections, wherein a weight associated with the computing unit is responsive to either a connection or lack of connection internal to the unit cell or between the unit element and a wordline and a bitline utilized to form an array of rows and columns in the ROM computing unit, and one or more passive or active electrical elements located in the unit element, wherein the passive or active electrical elements are configured to adjust the weight associated with the compute unit, wherein the ROM computing unit is configured to receive an input and output a value associated with the matrix operation, wherein the value is responsive to the input and weight.