Rounded Conductor Lines via Multi-Rate Dielectric Etching

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Solution Overview

Problem

High voltages applied between conductor lines in semiconductor components can cause electrical breakdowns, particularly due to sharp edges and peaks in the conductor lines, which existing technologies have not adequately addressed.

Innovation Solution

A method for producing rounded conductor lines in semiconductor components by creating a dielectric layer with different etch rates and using isotropic etching techniques to form a trench, which is then filled with conductive material, resulting in a conductor line with a rounded cross-section that reduces electric field intensity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional conductor lines with sharp edges are used, then manufacturing is simpler, but electrical breakdowns occur under high voltage

Engineering Contradiction:
Improveelectrical breakdown resistanceVSAvoidconductor line fabrication complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies curvature by rounding the outer edges and peaks of conductor lines through a multi-step etching process. The dielectric layer is etched with different etch rates to gradually remove sharp features, transforming the conductor line geometry from sharp-edged to rounded. This curvature eliminates field concentration points, preventing electrical breakdowns while maintaining manufacturing feasibility through standardized etching techniques.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The patent implements local quality by applying different etch rates to different regions of the dielectric layer. The etching process is localized to areas adjacent to conductor lines, with higher etch rates applied specifically where sharp edges and peaks exist. This selective local modification rounds only the critical areas without affecting the entire structure, balancing reliability improvement with manufacturing efficiency.

Inventive Principle:
Principle #3Local quality

2Reliability

If isotropic etching is used to round conductor lines, then electric field distribution improves, but etching precision becomes more challenging

Engineering Contradiction:
Improveelectric field distributionVSAvoidetching control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent employs parameter changes by systematically varying etch rate parameters across different etching steps. Multiple etching stages are used with progressively adjusted parameters, where each step removes material at a controlled rate to achieve the desired rounding profile. This multi-parameter approach transforms the challenging isotropic etching process into a controllable sequence of operations, improving electric field distribution while maintaining manufacturing precision.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively reduces electrical breakdowns by minimizing sharp edges and peaks, thereby enhancing the reliability and performance of semiconductor components under high voltage conditions.

Implementation Method 1

the trench is widened by etching the trench with the etchant at different etch rates. As an etching method, any isotropic wet etching and/or isotropic dry etching method may be used.

Methodology Applied
Scientific EffectIsotropic etching:

Implementation Method 2

For instance, a suitable isotropic dry etching technique is chemical dry etching (CDE).

Methodology Applied
Scientific EffectChemical dry etching:

Data Source

PatentUS10090192B2Method for producing a conductor line
Publication Date: 2018.10.02 INFINEON TECH AUSTRIA AG
  • US10090192B2 patent drawing
  • US10090192B2 patent drawing
  • US10090192B2 patent drawing

AI summary

A method for producing a rounded conductor line of a semiconductor component is disclosed. In that method, a partially completed semiconductor component is provided. The partially completed semiconductor component has a bottom side and a top side spaced distant from the bottom side in a vertical direction. Also provided is an etchant. On the top side, a dielectric layer is arranged. The dielectric layer has at least two different regions that show different etch rates when they are etched with the etchant. Subsequently, a trench is formed in the dielectric layer such that the trench intersects each of the different regions. Then, the trench is widened by etching the trench with the etchant at different etch rates. By filling the widened trench with an electrically conductive material, a conductor line is formed.