Rounded Package Traces for Low-Loss High-Speed Interconnects

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Solution Overview

Problem

Current packaging architectures for high-speed interconnects in IC packages face challenges in minimizing signal loss due to conductor and dielectric losses, particularly at high data transmission rates exceeding 10 GHz, where bulk conductor loss dominates and is exacerbated by shrinking trace dimensions and impedance discontinuities.

Innovation Solution

The implementation of a package substrate with conductive traces having a non-rectangular cross-section with rounded corners, surrounded by a conductive structure, which reduces current crowding and allows for wider traces, thereby increasing impedance and reducing insertion loss, while maintaining or improving signal integrity for both single-ended and differential signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If trace dimensions are shrunk to increase interconnect density, then packaging productivity is improved, but conductor loss increases due to reduced trace width and increased current density

Engineering Contradiction:
Improveinterconnect densityVSAvoidconductor loss
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent applies curvature by rounding the corners of conductive traces instead of using sharp rectangular corners. This rounding reduces current crowding at the corners, thereby reducing conductor loss while maintaining smaller trace dimensions for high density. The rounded trace geometry redistributes current more evenly across the trace cross-section.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The patent changes the geometric parameters of the conductive traces by introducing a rounded corner radius (e.g., 5-10 micrometers) and optimizing trace width and spacing. These parameter changes enable the traces to maintain lower resistance and reduced current crowding effects even at smaller dimensions, achieving both high density and low loss.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If trace dimensions are shrunk to increase interconnect density, then packaging productivity is improved, but impedance discontinuities increase causing signal integrity degradation

Engineering Contradiction:
Improveinterconnect densityVSAvoidsignal integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The rounded corner geometry provides smoother transitions for electromagnetic fields along the trace path, reducing impedance discontinuities compared to sharp corners. This curvature effect maintains more consistent impedance control even as trace dimensions are reduced for higher density interconnects.

Inventive Principle:
Principle #14Spheroidality (Curvature)

3Ease of manufacture

If conventional rectangular traces are used, then manufacturing is simpler, but current crowding occurs at corners increasing insertion loss

Engineering Contradiction:
Improvetrace fabrication simplicityVSAvoidinsertion loss
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The patent implements rounded corner traces that can be fabricated using standard photolithography and electroplating processes. The rounding is achieved through controlled etching or deposition processes that are compatible with existing manufacturing workflows, thereby maintaining ease of manufacture while significantly reducing current crowding and insertion loss.

Inventive Principle:
Principle #14Spheroidality (Curvature)

4Loss of energy

If trace width is increased to reduce current density and conductor loss, then conductor loss is reduced, but pitch increases reducing packaging density

Engineering Contradiction:
Improveconductor lossVSAvoidpackaging density
Core Design Contradiction:
Loss of energyVSProductivity

Solution Approach 1:

The rounded corner geometry reduces current crowding effects, allowing traces to maintain lower effective resistance even at smaller widths. This enables the traces to achieve lower conductor loss without increasing pitch, thereby maintaining high packaging density while reducing energy loss.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Data Source

PatentUS20230420347A1Packaging architecture with rounded traces for on-package high-speed interconnects
Publication Date: 2023.12.28 INTEL CORP
  • US20230420347A1 patent drawing
  • US20230420347A1 patent drawing
  • US20230420347A1 patent drawing

AI summary

Embodiments of a microelectronic assembly comprise: a package substrate having a first face and an opposing second face, the package substrate comprising a conductive trace in a dielectric material, a conductive structure at least partially surrounding the conductive trace and separated from the conductive trace by the dielectric material; and an integrated circuit (IC) die attached to the first face of the package substrate and coupled to the conductive trace by a conductive pathway through the package substrate. The conductive trace has a non-rectangular cross-section with rounded corners, the conductive structure comprises a plurality of conductive planes parallel to the conductive trace and coupled to a ground connection.