Routing Circuit Modulo-Division Mapping for Non-Power-of-Two Topologies

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Solution Overview

Problem

Existing computer systems face inefficiencies when dealing with resource topologies where the number of routing options is not a power of two, leading to issues such as 'holes' in the address space and aliasing, particularly when modifying existing designs to accommodate non-power-of-two options.

Innovation Solution

A routing circuit that utilizes mod-n and div-n operations on different portions of a request address to determine routing selections for dimensions with non-power-of-two options, avoiding aliasing by combining mod-n and div-n results to ensure unique routing decisions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If power-of-two routing options are used in resource topology, then routing simplicity is improved, but adaptability to non-power-of-two configurations deteriorates

Engineering Contradiction:
Improverouting simplicityVSAvoidadaptability to non-power-of-two configurations
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

The patent changes the routing parameter from fixed power-of-two options to flexible mod-n options where n can be any integer. This allows the routing system to adapt to different topology configurations (e.g., 3D XPoint memory with 16, 32, or 64 options per dimension) while maintaining efficient routing through modular arithmetic operations that work for any n value.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If non-power-of-two routing options are implemented, then adaptability is improved, but address space completeness deteriorates due to holes and aliasing

Engineering Contradiction:
Improveadaptability to non-power-of-two optionsVSAvoidaddress space completeness
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent introduces an additional dimension to the routing decision process by using two independent mod-n operations instead of a single operation. The first mod-n operation on high address bits and the second mod-n operation on low address bits work together to fully utilize the address space, eliminating holes and aliasing that would otherwise occur with non-power-of-two routing options.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If mod-n operations are used for routing, then routing efficiency for non-power-of-two options is improved, but circuit complexity increases

Engineering Contradiction:
Improverouting efficiencyVSAvoidcircuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the address space into high and low portions, each processed by independent mod-n operation circuits. This segmentation allows the complex mod-n routing logic to be divided into manageable, reusable modular blocks that can be independently optimized and combined, reducing overall circuit complexity while maintaining routing efficiency for non-power-of-two options.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12436888B2Routing circuit for computer resource topology
Publication Date: 2025.10.07 APPLE INC
  • US12436888B2 patent drawing
  • US12436888B2 patent drawing
  • US12436888B2 patent drawing

AI summary

A routing circuit for an integrated circuit configured to access a set of resources that are organized according to a topology with a plurality of dimensions. The routing receives a request for a particular resource of the set of resources that includes an address that includes first and second sets of bits, the topology having a first dimension with n routing options (where n is not a power of two) and a second dimension with m routing options. The routing circuit determines first and second routing selections for the first and second dimensions by performing respective modulo-n and div-n operations on values formed from the address that include the first and second set of bits. The routing circuit then activates one or more selection signals in accordance with the first and second routing selections that are usable to cause the particular resource to be selected in response to the request.