Routing Die Integration for High Density Semiconductor Packaging
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving high integration density and creative packaging techniques for semiconductor dies, particularly in Package-on-Package (PoP) technology, where traditional redistribution structures have limited routing density and complexity in manufacturing.
Innovation Solution
The implementation of a routing die with a fine-pitch routing density, integrated into the package structure, which is bonded face-to-face with semiconductor dies and encapsulated within the same encapsulant, and positioned between the dies and the front-side redistribution structure, enhancing routing density and simplifying the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional redistribution structures are used in PoP technology, then manufacturing process is simpler, but routing density is limited
Solution Approach 1:
The patent introduces a dedicated routing die as a separate component between the semiconductor die and the redistribution structure. This segmentation allows the routing function to be isolated on a specialized die with fine-pitch interconnects, achieving high routing density (up to 66 times greater than traditional structures) while keeping the manufacturing process manageable by dividing the complex interconnection task across multiple specialized components rather than attempting to integrate all routing functions into a single complex redistribution layer
2Quantity of substance
If routing die with fine-pitch routing density is implemented, then routing density increases, but device complexity increases
Solution Approach 1:
The patent merges the routing die with the encapsulant structure, where the routing die is bonded face-to-face with the semiconductor die and then both are encapsulated together in the same encapsulant material. This merging approach simplifies the overall package structure by integrating multiple components (routing die, semiconductor die, encapsulant) into a unified assembly, reducing the number of separate packaging steps and interfaces while maintaining the high routing density benefit
3Quantity of substance
If multiple dies are stacked in PoP technology, then integration density increases, but warpage increases
Solution Approach 1:
The patent applies local quality by positioning the routing die with its fine-pitch interconnect structure specifically at the interface between the semiconductor die and the redistribution structure, where the highest routing density is needed. The routing die itself acts as a localized buffer zone that distributes mechanical stresses, reducing warpage in the overall stacked package while maintaining high integration density. The fine-pitch routing is concentrated where most needed, rather than uniformly distributed throughout the entire package structure
Data Source
AI summary
In an embodiment, a package includes a first package structure including a first integrated circuit die having an active side and a back-side, the active side including die connectors, a second integrated circuit die adjacent the first integrated circuit die, the second integrated circuit die having an active side and a back-side, the active side including die connectors, a routing die including die connectors bonded to the active sides of the first integrated circuit die and the second integrated circuit die, the routing die electrically coupling the first integrated circuit die to the second integrated circuit die, an encapsulant encapsulating the first integrated circuit die, the second integrated circuit die, and the routing die, and a first redistribution structure on and electrically connected to the die connectors of the first integrated circuit die and the second integrated circuit die.