Memory Row Hammer Counters With Error-Corrected Access Tracking
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Solution Overview
Problem
Memory devices experience increased information decay in nearby memory cells due to certain access patterns, necessitating reliable tracking of row access counts to identify aggressor rows for targeted refresh operations, while ensuring data integrity against errors such as neutron strikes.
Innovation Solution
Implement a memory device with counter memory cells storing access counts, utilizing a counter circuit to adjust counts based on access patterns and incorporate a count error correction circuit using majority voting to ensure data reliability, thereby identifying aggressor rows for targeted refresh operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If access counts are stored in memory cells to track row hammer patterns, then the ability to identify aggressor rows is improved, but the reliability of count data deteriorates due to errors such as neutron strikes
Solution Approach 1:
The patent stores multiple copies of the same access count value in different memory cells (e.g., using bank interleaving where the same row hammer count is distributed across multiple banks). This allows the system to retrieve redundant copies and detect/correct errors through comparison, maintaining data integrity while enabling accurate row hammer pattern tracking.
Solution Approach 2:
The patent introduces an intermediate error detection and correction mechanism that sits between the memory cells storing count values and the row hammer detection logic. This intermediary layer checks the retrieved count values for errors (such as those caused by neutron strikes) and corrects them before the counts are used to identify aggressor rows, thus preserving both reliability and measurement accuracy.
2Reliability
If multiple copies of count data are stored to improve reliability, then data integrity is improved, but the device complexity increases
Solution Approach 1:
The patent combines the error protection mechanism with the existing row hammer detection infrastructure by integrating multiple count storage locations into the current memory bank structure. Rather than adding a completely separate redundant storage system, the invention merges reliability improvements into the existing architecture, using the same memory resources to serve both primary storage and error protection functions.
Data Source
AI summary
Apparatuses and methods increased reliability row hammer counts. Each word line of a memory may have an associated count value, stored in memory cells of the word line. Information in memory cells may be prone to change, such as from neutron strike. A counter circuit may decrease the count value each time the word line is accessed, since a decreasing count will tend to overestimate accesses due to error. A count error correction circuit may check the count value against redundant information and correct the count value if there is an error. Decreasing counts and count error correction may be used together to further increase reliability.