Row Hammer Refresh Address Calculation Circuit for Semiconductor Memory
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Solution Overview
Problem
The miniaturization of semiconductor memory devices leads to increased leakage current, making it difficult to retain data solely through traditional refresh operations, especially for frequently accessed row addresses.
Innovation Solution
A semiconductor memory device with a row hammer refresh address (RHA) calculation circuit that identifies and refreshes memory cells corresponding to calculated RHA addresses, optimizing the refresh operation by calculating adjacent and further-adjacent RHA addresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional refresh operations are used, then data retention is maintained, but leakage current increases significantly with miniaturization making data retention difficult
Solution Approach 1:
The patent applies preliminary action by proactively refreshing not only the frequently accessed row address (RHA) but also its adjacent row addresses before leakage current can cause data loss. The refresh control unit identifies RHA and automatically triggers refresh operations on RHA and its adjacent addresses, preventing data degradation before it occurs.
2Reliability
If row hammer refresh address calculation is performed to refresh adjacent addresses, then data retention is improved, but calculation complexity and time increase
Solution Approach 1:
The patent segments the refresh operation into distinct phases: first identifying the RHA, then calculating adjacent addresses, and finally executing refresh operations. This segmentation allows the refresh control unit to systematically handle each aspect of the refresh process, reducing overall calculation time while maintaining comprehensive data retention.
3Reliability
If row hammer refresh address calculation is performed to refresh adjacent addresses, then data retention is improved, but circuit scale becomes larger
Solution Approach 1:
The refresh control unit is designed with multi-functionality, handling both traditional refresh operations and row hammer refresh operations using the same basic circuit structure. By making the circuit universal, the patent avoids requiring separate dedicated circuits for different refresh modes, thereby controlling circuit scale while maintaining improved data retention capabilities.
Data Source
AI summary
A Row Hammer Refresh Address (RHA) calculation method, calculation circuit, and semiconductor memory device that are capable of performing RHA calculation at high speed on a small circuit scale are provided. The control unit of the RHA calculation circuit preferentially calculates the address obtained using a lighter operation (merely by inverting the least significant bit) as the adjacent RHA between the adjacent RHAs on both sides based on the refreshed seed address when the seed address is refreshed. Alternatively, it preferentially calculates the address obtained using a lighter operation (merely by inverting the least significant bit) as the further adjacent RHA between the further adjacent RHAs on both sides based on the refreshed seed address when the seed address is refreshed.