RRAM Control Circuit Cancel Verify Operations
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Solution Overview
Problem
Resistance random access memory devices face issues with unwanted voltage application to half-selected memory cells, leading to potential data corruption due to undesired changes in their resistance states during operations like set and reset operations.
Innovation Solution
A semiconductor storage device with a control circuit that applies specific voltage polarities and levels to selected and half-selected memory cells to prevent unwanted state changes, using a cancel operation and verify operation to resolve disturbances in half-selected memory cells, ensuring data retention and accurate readout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage is applied to a selected memory cell to change its resistance state, then the selected memory cell's resistance state is successfully changed, but voltage is also applied to half-selected memory cells causing unwanted changes in their resistance states
Solution Approach 1:
The patent applies a preliminary counter-voltage to half-selected memory cells before the main write voltage is applied. This counter-voltage creates a protective effect that prevents the subsequent write voltage from causing unwanted resistance state changes in half-selected cells, while the selected cell still receives the full write voltage needed for successful programming.
Solution Approach 2:
The patent applies different voltage levels to different groups of memory cells simultaneously. Half-selected memory cells receive a first voltage level that prevents unwanted state changes, while the selected memory cell receives a second, higher voltage level that successfully changes its resistance state. This localized differentiation of voltage quality resolves the contradiction between protecting half-selected cells and programming the selected cell.
2Measurement precision
If voltage is applied to bit lines and word lines with different timings, then the selected memory cell can be precisely targeted, but unselected memory cells may experience unwanted voltage application and data corruption
Solution Approach 1:
The patent applies voltage to bit lines or word lines in a preliminary manner before the main write operation. This preliminary voltage application prepares the electrical state of lines connected to half-selected memory cells, ensuring that when the main write voltage is applied later, the half-selected cells are already in a protected state that prevents unwanted resistance changes, while maintaining precise targeting capability.
3Measurement precision
If cancel and verify operations are executed separately from reset operations, then each operation can be performed accurately, but the total operating time increases
Solution Approach 1:
The patent merges the cancel operation, verify operation, and reset operation into a single integrated operation sequence. By combining these operations that were previously performed separately, the patent maintains the accuracy of each individual operation while significantly reducing the total operating time required for memory write and verification processes.
Solution Approach 2:
The patent implements continuous operation where the cancel, verify, and reset operations are performed in an unbroken sequence without idle time between them. This continuous execution maintains the precision needed for accurate resistance state verification while eliminating time losses that would occur with separate, discrete operation cycles.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses fluctuations in memory cell resistance states, maintaining data integrity by executing cancel and verify operations simultaneously with reset operations, thereby reducing operating time and ensuring accurate data retention.
Implementation Method 1
memory cells, which each use variations in the resistance value of a variable resistance element to store data
Implementation Method 2
When applying a voltage to a selected memory cell, which is large enough to change its resistance state
Data Source
AI summary
According to one embodiment, provided is a semiconductor storage device that includes a control circuit to control the voltage that is applied to the memory cell. The control circuit is configured to execute a reset operation that applies a reset voltage of a first polarity to a selected memory cell that is connected to a selected first wire and a selected second wire during a reset operation. The control circuit is configured to execute a cancel operation that applies a cancel voltage of a second polarity that is opposite to the first polarity to an unselected memory cell and at the same time can execute a verify operation that reads out the state of the selected memory cell by applying a readout voltage of the second polarity to the selected memory cell. The cancel voltage and the readout voltage are the same voltage value.