RRAM Crossbar Circuit Programming With Reduced Write Disturbance
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Solution Overview
Problem
Crossbar circuits experience write disturbances due to parasitic capacitance affecting unselected resistive random-access memory (RRAM) devices, leading to unintended programming and extended programming times.
Innovation Solution
Incorporating a control circuit and operational amplifier to generate pulse-width modulated signals for charging and discharging capacitors, which control the voltage application to selected RRAM devices, synchronizing parasitic capacitor voltages and minimizing disturbances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional write operations are applied to crossbar circuits, then programming speed is maintained, but write disturbances occur causing extended programming times
Solution Approach 1:
The patent applies periodic action by using pulse-width modulated (PWM) signals to periodically charge and discharge the capacitor connected to the operational amplifier. This periodic charging/discharging creates controlled voltage ramps on the bit lines rather than abrupt voltage steps, which reduces write disturbances to unselected cells while maintaining programming speed for selected cells. The PWM duty cycle controls the rate of voltage change, effectively managing the trade-off between speed and disturbance.
2Productivity
If high voltage is applied to program selected RRAM devices, then programming efficiency is improved, but voltage differences affect unselected devices causing write disturbances
Solution Approach 1:
The patent introduces an operational amplifier with a capacitor as an intermediary between the control circuit and the bit lines. This intermediary circuitry transforms the digital control signal into a controlled analog voltage ramp on the bit lines. The operational amplifier acts as a buffer that can drive high voltages for programming selected cells while the capacitor controls the rate of voltage change, preventing abrupt voltage transitions that would cause write disturbances to unselected devices.
Solution Approach 2:
The patent changes the temporal parameter of voltage application by using a capacitor to create a time-dependent voltage ramp instead of an instantaneous voltage step. The voltage on the bit lines changes gradually over time according to the capacitor charging/discharging curve, which reduces the voltage difference experienced by unselected devices during the programming process. This parameter change from step-function to ramp-function voltage application effectively reduces write disturbances while maintaining programming efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents unintentional programming of unselected RRAM devices by maintaining low voltage differences, thereby reducing write disturbances and optimizing programming efficiency.
Implementation Method 1
a capacitor configured to be connected to a reference via a first switch; and an operational amplifier. Each of the plurality of cross-point devices is connected to at least one of the plurality of word lines, at least one of the plurality of bit lines, and a select line. A first input of the operational amplifier is connected to the capacitor.
Implementation Method 2
an operational amplifier. Each of the plurality of cross-point devices is connected to at least one of the plurality of word lines, at least one of the plurality of bit lines, and a select line. A first input of the operational amplifier is connected to the capacitor. An output of the operational amplifier is operatively connected to one or more of the word lines or bit lines via one or more switches.
Data Source
AI summary
The present disclosure provides for crossbar circuits with minimized write disturbance. A crossbar circuit may include a plurality of bit lines intersecting with a plurality of word lines, a plurality of select lines, a plurality of cross-point devices, and a ramp-rate adjustable DAC that comprises a control circuit and an operational amplifier. An input of the operational amplifier is connected to a capacitor. The control circuit may generate, based on a digital input, a control signal. To program a cross-point device of the crossbar circuit, the capacitor may be charged using a reference current. As the charging rate of the capacitor is limited by the reference current, and the charging duration is controlled by the control signal, thus the output of the operational amplifier corresponds to the digital input and may be applied to the cross-point device as a programming signal with limited slew-rate adjustable by the reference current.


